Fix #1507

app/oxide-rot-1/app-dev.toml

@@ -77,7 +77,7 @@ task-slots = ["syscon_driver"]
 [tasks.sprot]
 name = "drv-lpc55-sprot-server"
 priority = 6
-max-sizes = {flash = 44384, ram = 32768}
+max-sizes = {flash = 45384, ram = 32768}
 uses = ["flexcomm8", "bootrom"]
 features = ["spi0"]
 start = true
@@ -95,7 +95,7 @@ pins = [
     # HS_SPI_SCK = P1_2 = FUN6
     { pin = { port = 1, pin = 2}, alt = 6},
     # HS_SSEL1 = P1_1 = FUN5
-    { pin = { port = 1, pin = 1}, alt = 5},
+    { name = "CHIP_SELECT", pin = { port = 1, pin = 1}, alt = 5},
     # ROT_IRQ = P0_18 = FUN0
     { name = "ROT_IRQ", pin = { port = 0, pin = 18}, alt = 0, direction = "output"},
     # SP_RESET = P0_9 = FUN0

app/oxide-rot-1/app.toml

@@ -68,7 +68,7 @@ task-slots = ["syscon_driver"]
 [tasks.sprot]
 name = "drv-lpc55-sprot-server"
 priority = 6
-max-sizes = {flash = 44384, ram = 32768}
+max-sizes = {flash = 45384, ram = 32768}
 uses = ["flexcomm8", "bootrom"]
 features = ["spi0"]
 start = true
@@ -86,7 +86,7 @@ pins = [
     # HS_SPI_SCK = P1_2 = FUN6
     { pin = { port = 1, pin = 2}, alt = 6},
     # HS_SSEL1 = P1_1 = FUN5
-    { pin = { port = 1, pin = 1}, alt = 5},
+    { name = "CHIP_SELECT", pin = { port = 1, pin = 1}, alt = 5},
     # ROT_IRQ = P0_18 = FUN0
     { name = "ROT_IRQ", pin = { port = 0, pin = 18}, alt = 0, direction = "output"},
     # SP_RESET = P0_9 = FUN0

app/rot-carrier/app.toml

@@ -108,7 +108,7 @@ task-slots = ["syscon_driver"]
 [tasks.sprot]
 name = "drv-lpc55-sprot-server"
 priority = 6
-max-sizes = {flash = 44384, ram = 32768}
+max-sizes = {flash = 45384, ram = 32768}
 uses = ["flexcomm8", "bootrom"]
 features = ["spi0"]
 start = true
@@ -126,7 +126,7 @@ pins = [
     # HS_SPI_SCK = P1_2 = FUN6
     { pin = { port = 1, pin = 2}, alt = 6},
     # HS_SSEL1 = P1_1 = FUN5
-    { pin = { port = 1, pin = 1}, alt = 5},
+    { name = "CHIP_SELECT", pin = { port = 1, pin = 1}, alt = 5},
     # ROT_IRQ = P0_18 = FUN0
     { name = "ROT_IRQ", pin = { port = 0, pin = 18}, alt = 0, direction = "output"},
     # SP_RESET = P0_9 = FUN0

drv/lpc55-spi/src/lib.rs

@@ -179,7 +179,7 @@ impl Spi {
     }
 
     /// Clear Slave Select Asserted interrupt
-    pub fn ssa_clear(&mut self) {
+    pub fn ssa_clear(&self) {
         self.reg.stat.write(|w| w.ssa().set_bit());
     }
 
@@ -248,7 +248,7 @@ impl Spi {
     /// but that would leave us in a weird place where we wouldn't know what state
     /// the fifo was in. Since FIFOWR is write-only, we just set the frame size
     /// on each wite and ensure we pair writes and reads of the same width.
-    pub fn send_u16(&mut self, entry: u16) {
+    pub fn send_u16(&self, entry: u16) {
         self.reg.fifowr.write(|w| unsafe {
             w.len()
                 // 0xF = Data transfer is 16 bits in length.
@@ -340,4 +340,9 @@ impl Spi {
     pub fn read_u16(&mut self) -> u16 {
         self.reg.fiford.read().rxdata().bits() as u16
     }
+
+    pub fn read_u16_with_sot(&self) -> (u16, bool) {
+        let reader = self.reg.fiford.read();
+        (reader.rxdata().bits() as u16, reader.sot().bit_is_set())
+    }
 }

drv/lpc55-sprot-server/src/handler.rs

@@ -69,12 +69,19 @@ impl Handler {
         }
     }
 
-    /// Serialize and return a `SprotError::FlowError`
     pub fn flow_error(&self, tx_buf: &mut [u8; RESPONSE_BUF_SIZE]) -> usize {
         let body = Err(SprotProtocolError::FlowError.into());
         Response::pack(&body, tx_buf)
     }
 
+    pub fn desynchronized_error(
+        &self,
+        tx_buf: &mut [u8; RESPONSE_BUF_SIZE],
+    ) -> usize {
+        let body = Err(SprotProtocolError::Desynchronized.into());
+        Response::pack(&body, tx_buf)
+    }
+
     pub fn handle(
         &mut self,
         rx_buf: &[u8],