sprot: turn ROT_IRQ into a real IRQ
#1696
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Build failure is because I haven't actually updated |
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lzrd
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Apr 5, 2024
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@lzrd Okay, I've addressed all the review suggestions, going to re-run the e2e tests to make sure I didn't break anything. Also, #1734 adds codegen which will allow us to replace the hard-coded pin sets with the pin sets defined in the IRQ config. Depending on which PR merges first, I'll either update this branch to use that, or that branch to change this code. |
lzrd
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hawkw
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In PR #1696, I broke the `drv-stm32h7-sprot-server` code for waiting for `ROT_IRQ` to change state. The `ROT_IRQ` signal is active low (and in the schematic it's called `ROT_TO_SP_IRQ_L`), but in the code, the pin is just referred to as `ROT_IRQ`, so I configured edge sensitivity backwards, meaning we missed the IRQ signal. Oops, my bad. This commit changes the edge sensitivity to wait for the falling edge when waiting for `ROT_IRQ` to be asserted, and to wait for the rising edge when waiting for it to be deasserted, instead of the other way around. Now, it actually works correctly. ```console eliza@lurch ~ $ pfexec humility -t psc-sp flash && faux-mgs --interface axf1 --discovery-addr [fe80::aa40:25ff:fe06:103%3]:11111 state humility: attaching with chip set to "STM32H753ZITx" humility: attached to 0483:374e:0037001B5553500720393256 via ST-Link V3 humility: flash/archive mismatch; reflashing humility: flashing done Apr 07 18:07:31.725 INFO creating SP handle on interface axf1, component: faux-mgs Apr 07 18:07:33.727 INFO initial discovery complete, addr: [fe80::aa40:25ff:fe06:103%3]:11111, interface: axf1, component: faux-mgs Apr 07 18:07:33.733 INFO V2(SpStateV2 { hubris_archive_id: [53, 140, 208, 151, 27, 45, 232, 176], serial_number: [66, 82, 77, 52, 53, 50, 50, 48, 48, 48, 51, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], model: [57, 49, 51, 45, 48, 48, 48, 48, 48, 48, 51, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], revision: 8, base_mac_address: [168, 64, 37, 6, 1, 2], power_state: A2, rot: Ok(RotStateV2 { active: A, persistent_boot_preference: A, pending_persistent_boot_preference: None, transient_boot_preference: None, slot_a_sha3_256_digest: Some([175, 36, 236, 22, 163, 153, 65, 80, 159, 252, 36, 30, 77, 25, 52, 93, 158, 50, 246, 178, 139, 62, 218, 107, 9, 29, 129, 29, 100, 174, 133, 25]), slot_b_sha3_256_digest: Some([139, 130, 30, 66, 20, 39, 59, 105, 242, 21, 10, 7, 147, 124, 64, 253, 57, 156, 212, 176, 189, 255, 59, 243, 172, 9, 204, 75, 221, 250, 208, 53]) }) }), component: faux-mgs hubris archive: 358cd0971b2de8b0 serial number: BRM45220003 model: 913-0000003 revision: 8 base MAC address: a8:40:25:06:01:02 power state: A2 RotStateV2 { active: A, persistent_boot_preference: A, pending_persistent_boot_preference: None, transient_boot_preference: None slot_a_sha3_256_digest: af24ec16a39941509ffc241e4d19345d9e32f6b28b3eda6b091d811d64ae8519, slot_b_sha3_256_digest: 8b821e4214273b69f2150a07937c40fd399cd4b0bdff3bf3ac09cc4bddfad035, } eliza@lurch ~ $ pfexec humility -t psc-sp ringbuf sprot_server humility: attached to 0483:374e:0037001B5553500720393256 via ST-Link V3 humility: ring buffer drv_stm32h7_sprot_server::__RINGBUF in sprot: NDX LINE GEN COUNT PAYLOAD 0 243 1 1 Sent(0xa) 1 365 1 1 WaitRotIrq(true, 0x5) 2 285 1 1 Received(0x51) eliza@lurch ~ $ ```
hawkw
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Apr 7, 2024
In PR #1696, I broke the `drv-stm32h7-sprot-server` code for waiting for `ROT_IRQ` to change state. The `ROT_IRQ` signal is active low (and in the schematic it's called `ROT_TO_SP_IRQ_L`), but in the code, the pin is just referred to as `ROT_IRQ`, so I configured edge sensitivity backwards, meaning we missed the IRQ signal. Oops, my bad. This commit changes the edge sensitivity to wait for the falling edge when waiting for `ROT_IRQ` to be asserted, and to wait for the rising edge when waiting for it to be deasserted, instead of the other way around. Now, it actually works correctly. ```console eliza@lurch ~ $ pfexec humility -t psc-sp flash && faux-mgs --interface axf1 --discovery-addr [fe80::aa40:25ff:fe06:103%3]:11111 state humility: attaching with chip set to "STM32H753ZITx" humility: attached to 0483:374e:0037001B5553500720393256 via ST-Link V3 humility: flash/archive mismatch; reflashing humility: flashing done Apr 07 18:07:31.725 INFO creating SP handle on interface axf1, component: faux-mgs Apr 07 18:07:33.727 INFO initial discovery complete, addr: [fe80::aa40:25ff:fe06:103%3]:11111, interface: axf1, component: faux-mgs Apr 07 18:07:33.733 INFO V2(SpStateV2 { hubris_archive_id: [53, 140, 208, 151, 27, 45, 232, 176], serial_number: [66, 82, 77, 52, 53, 50, 50, 48, 48, 48, 51, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], model: [57, 49, 51, 45, 48, 48, 48, 48, 48, 48, 51, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], revision: 8, base_mac_address: [168, 64, 37, 6, 1, 2], power_state: A2, rot: Ok(RotStateV2 { active: A, persistent_boot_preference: A, pending_persistent_boot_preference: None, transient_boot_preference: None, slot_a_sha3_256_digest: Some([175, 36, 236, 22, 163, 153, 65, 80, 159, 252, 36, 30, 77, 25, 52, 93, 158, 50, 246, 178, 139, 62, 218, 107, 9, 29, 129, 29, 100, 174, 133, 25]), slot_b_sha3_256_digest: Some([139, 130, 30, 66, 20, 39, 59, 105, 242, 21, 10, 7, 147, 124, 64, 253, 57, 156, 212, 176, 189, 255, 59, 243, 172, 9, 204, 75, 221, 250, 208, 53]) }) }), component: faux-mgs hubris archive: 358cd0971b2de8b0 serial number: BRM45220003 model: 913-0000003 revision: 8 base MAC address: a8:40:25:06:01:02 power state: A2 RotStateV2 { active: A, persistent_boot_preference: A, pending_persistent_boot_preference: None, transient_boot_preference: None slot_a_sha3_256_digest: af24ec16a39941509ffc241e4d19345d9e32f6b28b3eda6b091d811d64ae8519, slot_b_sha3_256_digest: 8b821e4214273b69f2150a07937c40fd399cd4b0bdff3bf3ac09cc4bddfad035, } eliza@lurch ~ $ pfexec humility -t psc-sp ringbuf sprot_server humility: attached to 0483:374e:0037001B5553500720393256 via ST-Link V3 humility: ring buffer drv_stm32h7_sprot_server::__RINGBUF in sprot: NDX LINE GEN COUNT PAYLOAD 0 243 1 1 Sent(0xa) 1 365 1 1 WaitRotIrq(true, 0x5) 2 285 1 1 Received(0x51) eliza@lurch ~ $ ```
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The
ROT_IRQline is used by the RoT to raise an interrupt to the SP.Currently, the
drv-stm32h7-sprot-servertask waits for this IRQ bypolling the state of the GPIO in a loop, with a comment saying that once
we can receive EXTI IRQs, we should use EXTI instead.
Now that #1691 and #1693 have merged, we can actually use EXTI to
receive interrupts on GPIO pin state changes. So, this branch updates
the
stm32h7-sprot-servertask to use EXTI, instead. We now also usethe timer notification to implement the timeout while waiting for the
interrupt, which was previously implemented by counting the number of
loops.
I've tested this change using the
sprot-e2eframework on a PSC, usingthe SP image built from this branch and the RoT images built from
@lzrd's
update-stage0branch. If there's any additional testing Iought to do, I'm happy to take suggestions.
In a follow-up change, I'd like to also implement the task configuration
for this pin, so that it's no longer hard-coded in the
app.tomls.