Optimzed backward pass for ROCm devices (#3468)

Summary:
X-link: facebookresearch/FBGEMM#552


X-link: facebookresearch/FBGEMM#491

Added optimized implementation of backward pass for ROCm devices. Currently support **not nobag** mode, **rowwise_adagrad** optimizer with non-mixed dimensions in [64, 128, 160, 192].


Reviewed By: leitian

Differential Revision: D66310520

Pulled By: q10

wip

[fbgemm_gpu] Re-enable cache tests for ROCm

- Re-enable UVM cache tests for ROCm

Increase time-out for CUDA OSS CI (#3230)

Summary:
Pull Request resolved: #3230

X-link: facebookresearch/FBGEMM#328

As titled.

Due to Test time out for CUDA > 12 e.g., https://github.com/pytorch/FBGEMM/actions/runs/11223255193/job/31198763459

Reviewed By: q10

Differential Revision: D64005199

fbshipit-source-id: 339421d50b35665d0ccc2a909faef8720155cfdb

Increase time-out for CUDA OSS CI (#3230)

Summary:
Pull Request resolved: #3230

X-link: facebookresearch/FBGEMM#328

As titled.

Due to Test time out for CUDA > 12 e.g., https://github.com/pytorch/FBGEMM/actions/runs/11223255193/job/31198763459

Reviewed By: q10

Differential Revision: D64005199

fbshipit-source-id: 339421d50b35665d0ccc2a909faef8720155cfdb

Increase time-out for CUDA OSS CI (#3230)

Summary:
Pull Request resolved: #3230

X-link: facebookresearch/FBGEMM#328

As titled.

Due to Test time out for CUDA > 12 e.g., https://github.com/pytorch/FBGEMM/actions/runs/11223255193/job/31198763459

Reviewed By: q10

Differential Revision: D64005199

fbshipit-source-id: 339421d50b35665d0ccc2a909faef8720155cfdb