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cartesian topology mapping improvements #12

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cartesian topology mapping improvements #12

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Pull Request Description

See issue pmodels#1654. This PR will implement mapping application virtual topologies to the physical machine topology.

Expected Impact

Author Checklist

  • Reference appropriate issues (with "Fixes" or "See" as appropriate)
  • Remove xfail from the test suite when fixing a test
  • Commits are self-contained and do not do two things at once
  • Commit message is of the form: module: short description and follows good practice
  • Passes whitespace checkers
  • Passes warning tests
  • Passes all tests
  • Add comments such that someone without knowledge of the code could understand
  • Add Devel Docs in the doc/ directory for any new code design

Some libraries require extra libraries in order to link, which is why
AC_CHECK_LIB takes an "other-libraries" argument.  Allow callers of
PAC_SET_HEADER_LIB_PATH to supply extra libraries and pass them to
AC_CHECK_LIB.
If no argument is supplied to AC_CHECK_LIB, a successful check will
result in adding -l<library> to LIBS. Since we manage libraries
separately from the LIBS variable, re-order the checks in
PAC_CHECK_HEADER_LIB to avoid adding unwanted values.
Integrate Scotch library for use in MPICH. Scotch provides graph
mapping functionality, which will be used to implement rank reordering
features in MPI virtual topology functions.

The initial integration builds a simple 2-level tree architecture
representing the on/off node process mapping. Future enhancements may
integrate hwloc and/or netloc information to build a more complex
architecture graph.
Use Scotch to create a communication graph from the cartesian virtual
topology info and map it to the node architecture.
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