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Pre-release v6.4.1-tywaves-SNAPSHOT

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@rameloni rameloni released this 02 Jun 09:21
· 104 commits to tywaves-annotations since this release
v6.4.1-tywaves-SNAPSHOT
91108bf

What's Changed

  • Annotate ports, registers and wires with Chisel type information in firrtl
  • Annotate Chisel Memories
  • Annotate types with constructor parameters (name, type, value)

Full Changelog: v6.1.0-tywaves-SNAPSHOT...v6.4.1-tywaves-SNAPSHOT

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