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CPU now runs diagnostics. Current errors are from difference between
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360 and 370, or not fully supporting invalid access for packed instructions.
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@rcornwell
rcornwell committed Jul 14, 2024
1 parent 10cbff7 commit 9523fdd
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Showing 9 changed files with 838 additions and 228 deletions.
324 changes: 171 additions & 153 deletions emu/cpu/cpu.go
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20 changes: 13 additions & 7 deletions emu/cpu/cpu.timer.go
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Original file line number Diff line number Diff line change
Expand Up @@ -74,13 +74,7 @@ func (cpu *cpuState) updateClock() {
cpu.todClock[1] = t

// Check if we should post a TOD irq
cpu.todIrq = false
if (cpu.clkCmp[0] < cpu.todClock[0]) ||
((cpu.clkCmp[0] == cpu.todClock[0]) && (cpu.clkCmp[1] < cpu.todClock[1])) {
// sim_debug(DEBUG_INST, &cpu_dev, "CPU TIMER CCK IRQ %08x %08x\n", clk_cmp[0],
// clk_cmp[1]);
cpu.todIrq = true
}
cpu.checkTODIrq()
}

// Update CPU timer, updated 300 times per second.
Expand All @@ -94,3 +88,15 @@ func (cpu *cpuState) updateClock() {
cpu.clkIrq = true
}
}

// Check if we should generate a TOD interrupt
func (cpu *cpuState) checkTODIrq() {
// Check if we should post a TOD irq
cpu.todIrq = false
if (cpu.clkCmp[0] < cpu.todClock[0]) ||
((cpu.clkCmp[0] == cpu.todClock[0]) && (cpu.clkCmp[1] < cpu.todClock[1])) {
// sim_debug(DEBUG_INST, &cpu_dev, "CPU TIMER CCK IRQ %08x %08x\n", clk_cmp[0],
// clk_cmp[1]);
cpu.todIrq = true
}
}
59 changes: 34 additions & 25 deletions emu/cpu/cpu_float.go
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Original file line number Diff line number Diff line change
Expand Up @@ -26,15 +26,14 @@ package cpu

// Floating point half register.
func (cpu *cpuState) opFPHalf(step *stepInfo) uint16 {
var exponent int
var sign bool
var err uint16

// Split number apart
exponent = int((step.fsrc2 & EMASKL) >> 56)
if (step.opcode & 0x10) != 0 {
step.fsrc2 &= HMASKL
}
sign = (step.fsrc2 & MSIGNL) != 0
exponent := int((step.fsrc2 & EMASKL) >> 56)
sign := (step.fsrc2 & MSIGNL) != 0
// if (step.opcode & 0x10) != 0 {
// step.fsrc2 &= HMASKL
// }
// Create guard digit
step.fsrc2 = (step.fsrc2 & MMASKL) << 4
// Divide by 2
Expand All @@ -48,11 +47,12 @@ func (cpu *cpuState) opFPHalf(step *stepInfo) uint16 {
// Check if underflow
if exponent < 0 {
if (cpu.progMask & EXPUNDER) != 0 {
return ircExpUnder
err = ircExpUnder
} else {
sign = false
step.fsrc2 = 0
exponent = 0
}
sign = false
step.fsrc2 = 0
exponent = 0
}

// Remove guard digit
Expand All @@ -70,7 +70,14 @@ func (cpu *cpuState) opFPHalf(step *stepInfo) uint16 {
if sign {
step.fsrc2 |= MSIGNL
}
return cpu.opFPLoad(step)

// Store results.
if (step.opcode & 0x10) == 0 {
cpu.fpregs[step.R1] = step.fsrc2
} else {
cpu.fpregs[step.R1] = (step.fsrc2 & HMASKL) | (cpu.fpregs[step.R1] & LMASKL)
}
return err
}

// Floating load register.
Expand Down Expand Up @@ -98,7 +105,7 @@ func (cpu *cpuState) opFPLCS(step *stepInfo) uint16 {
} else {
cpu.fpregs[step.R1] = (step.fsrc2 & HMASKL) | (cpu.fpregs[step.R1] & LMASKL)
}
if fsrc1 != 0 {
if (fsrc1 & MMASKL) != 0 {
if (step.fsrc2 & MSIGNL) != 0 {
cpu.cc = 1
} else {
Expand Down Expand Up @@ -255,12 +262,13 @@ func (cpu *cpuState) opFPAdd(step *stepInfo) uint16 {
sum = value1 + value2
}

var err uint16
// If v1 not normal shift left + expo
if (sum & CMASK) != 0 {
sum >>= 4
exponent1++
if exponent1 >= 128 {
return ircExpOver
err = ircExpOver
}
}

Expand Down Expand Up @@ -296,7 +304,6 @@ func (cpu *cpuState) opFPAdd(step *stepInfo) uint16 {
}
}

var err uint16
// Check signifigance exceptions
if cpu.cc == 0 && (cpu.progMask&SIGMASK) != 0 {
err = ircSignif
Expand All @@ -311,11 +318,12 @@ func (cpu *cpuState) opFPAdd(step *stepInfo) uint16 {
// Check if underflow
if exponent1 < 0 {
if (cpu.progMask & EXPUNDER) != 0 {
return ircExpUnder
err = ircExpUnder
} else {
sum = 0
sign1 = false
exponent1 = 0
}
sum = 0
sign1 = false
exponent1 = 0
}
}
}
Expand Down Expand Up @@ -472,12 +480,13 @@ func (cpu *cpuState) opFPAddD(step *stepInfo) uint16 {
sum = value1 + value2
}

var err uint16
// If v1 not normal shift left + expo
if (sum & CMASKL) != 0 {
sum >>= 4
exponent1++
if exponent1 >= 128 {
return ircExpOver
err = ircExpOver
}
}

Expand Down Expand Up @@ -513,7 +522,6 @@ func (cpu *cpuState) opFPAddD(step *stepInfo) uint16 {
}
}

var err uint16
// Check signifigance exceptions
if cpu.cc == 0 && (cpu.progMask&SIGMASK) != 0 {
err = ircSignif
Expand All @@ -530,11 +538,12 @@ func (cpu *cpuState) opFPAddD(step *stepInfo) uint16 {
// Check if underflow
if exponent1 < 0 {
if (cpu.progMask & EXPUNDER) != 0 {
return ircExpUnder
err = ircExpUnder
} else {
sum = 0
sign1 = false
exponent1 = 0
}
sum = 0
sign1 = false
exponent1 = 0
}
}
}
Expand Down
30 changes: 29 additions & 1 deletion emu/cpu/cpu_standard.go
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Original file line number Diff line number Diff line change
Expand Up @@ -894,6 +894,33 @@ func (cpu *cpuState) opSTM(step *stepInfo) uint16 {
}
}

// Handle memory to memory copy.
func (cpu *cpuState) opMVC(step *stepInfo) uint16 {
if err := cpu.testAccess(step.address1, uint32(step.reg), true); err != 0 {
return err
}
if err := cpu.testAccess(step.address2, uint32(step.reg), false); err != 0 {
return err
}

for {
dest, err := cpu.readByte(step.address2)
if err != 0 {
return err
}
err = cpu.writeByte(step.address1, dest)
if err != 0 {
return err
}
step.address1++
step.address2++
step.reg--
if step.reg == 0xff {
return 0
}
}
}

// Handle memory to memory instructions.
func (cpu *cpuState) opMem(step *stepInfo) uint16 {
if err := cpu.testAccess(step.address1, uint32(step.reg), true); err != 0 {
Expand Down Expand Up @@ -943,7 +970,8 @@ func (cpu *cpuState) opMem(step *stepInfo) uint16 {
} else {
dest = source
}
if err = cpu.writeByte(step.address1, dest); err != 0 {
err = cpu.writeByte(step.address1, dest)
if err != 0 {
return err
}
step.address1++
Expand Down
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