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Pull requests: riscv-collab/riscv-openocd

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Pull requests list

fix expose_csr for CSR from lower address space
#1221 opened Jan 30, 2025 by aap-sc Loading…
3
target/riscv: support deprecated user interrupt registers
#1220 opened Jan 29, 2025 by sobuch Loading…
2
target/riscv: refactored memory access result codes
#1218 opened Jan 29, 2025 by fk-sc Loading…
9
target/riscv: make sure target is halted when reset_halt is set
#1214 opened Jan 27, 2025 by jhqian Loading…
20
target/riscv: drop mtopi_readable/mtopei_readable riscv_info fields
#1209 opened Jan 17, 2025 by en-sc Loading…
@en-sc
6
target/riscv: pass jtag_tap instead of target
#1208 opened Jan 17, 2025 by en-sc Loading…
@en-sc
2
target/riscv: merged read/write functions to one access function
#1194 opened Dec 25, 2024 by fk-sc Loading…
21
target/riscv: access registers via reg->type
#1187 opened Dec 20, 2024 by en-sc Loading…
22
target/riscv: Add support for external triggers
#1179 opened Dec 2, 2024 by rbradford Loading…
19
target/riscv: Ensure to handle all triggered a halt events
#1171 opened Nov 20, 2024 by lz-bro Loading…
21
enable additional platforms in CI
#1121 opened Aug 30, 2024 by aap-sc Loading…
16
Fix error on exit with uninitialized target
#1015 opened Feb 11, 2024 by tom-van Loading…
3
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