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Clarify interaction of CBOs and PBMTs #1570

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Commits on Jul 26, 2024

  1. Clarify interaction of CBOs and PBMTs

    This is the suggestion from riscv/riscv-CMOs#57 (comment) which was never applied.
    
    The behaviour can be technically inferred from this paragraph - as noted in one of the comments on that issue:
    
    > Accessing the same location using different cacheability attributes may cause loss of coherence. Executing the following sequence between such accesses prevents both loss of coherence and loss of memory ordering: `fence iorw, iorw`, followed by `cbo.flush` to an address of that location, followed by a `fence iorw, iorw`.
    
    However this is subtle, which means implementation bugs are likely. Making it explicit removes the risk of confusion and the resulting bugs.
    Timmmm committed Jul 26, 2024
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