Merge pull request #39 from ved-rivos/cbqri1

Add CBQRI support for supervisor domains

chapter6.adoc

@@ -309,7 +309,10 @@ operations requested through `control.OP`.
   {bits: 24, name: 'SRC_ID'},
   {bits:  8, name: 'IOMMU_ID (WARL)'},
   {bits:  8, name: 'SDID (WARL)'},
-  {bits: 16, name: 'WPRI'}
+  {bits:  4, name: 'SRL'},
+  {bits:  4, name: 'SML'},
+  {bits:  4, name: 'SQRID'},
+  {bits:  4, name: 'WPRI'}
 ], config:{lanes: 8, hspace:1024}}
 ....
 
@@ -436,6 +439,13 @@ rule.
 The `SDID` field identifies the supervisor domain whose memory is accessed by
 this transaction.
 
+The `SRL` and `SML` fields along with `operand-1.SSM` field are used to determine
+the effective `RCID` and `MCID` provided by the IOMMU for device originated
+requests. The determination of the effective `RCID` and `MCID` is as specified
+by <<SMQOSID>>. The `SQRID` identifies the QRI for requests originating from the
+devices associated with the SD and accompanies the `RCID` and `MCID` in the
+requests made by the device to the QRI.
+
 [[OP-1]]
 === Operand 1 register (`operand-1`)
 
@@ -450,7 +460,8 @@ operations requested through `control.OP`.
   {bits:  4, name: 'MTT_MODE (WARL)'},
   {bits:  1, name: 'PPNV (WARL)'},
   {bits:  1, name: 'S (WARL)'},
-  {bits:  4, name: 'WPRI'},
+  {bits:  1, name: 'SSM'},
+  {bits:  3, name: 'WPRI'},
   {bits: 44, name: 'PPN'},
   {bits: 10, name: 'WPRI'}
 ], config:{lanes: 8, hspace:1024}}