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Return empty ESIL for new instructions which have immediates where pr…
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…eviously regs were assumed.
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Rot127 committed Jan 5, 2024
1 parent 2b0de30 commit 9f5e492
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3 changes: 3 additions & 0 deletions librz/analysis/arch/arm/arm_esil64.c
Original file line number Diff line number Diff line change
Expand Up @@ -244,6 +244,9 @@ static void shifted_reg64_append(RzStrBuf *sb, csh *handle, cs_insn *insn, int n
// got rid of the opchar= pattern here because it caused missing operators to fail silently
// and makes things more complicated with very little benefit
static void arm64math(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, csh *handle, cs_insn *insn, const char *opchar, int negate) {
if (ISIMM64(0) || ISIMM64(1)) {
return;
}
const char *r0 = REG64(0);
const char *r1 = REG64(1);

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15 changes: 15 additions & 0 deletions test/db/esil/arm_64
Original file line number Diff line number Diff line change
Expand Up @@ -899,3 +899,18 @@ EXPECT=<<EOF
x0 = 0x0000000000000005
EOF
RUN

NAME=orr v22.4h, 0, lsl 8
FILE=malloc://0x200
CMDS=<<EOF
e asm.arch=arm
e asm.bits=64
wx 16b4000f # orr v22.4h, 0, lsl 8
pd 1
pie 1
EOF
EXPECT=<<EOF
0x00000000 orr v22.4h, 0, lsl 8
0x00000000
EOF
RUN

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