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Fix #4070 #4071

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merged 1 commit into from
Jan 5, 2024
Merged

Fix #4070 #4071

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6 changes: 5 additions & 1 deletion librz/analysis/arch/arm/arm_esil64.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1040,7 +1040,11 @@ RZ_IPI int rz_arm_cs_analysis_op_64_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 a
if (REGSIZE64(0) == 4) {
rz_strbuf_appendf(&op->esil, "%s,0xffffffff,^,%s,&=", REG64(1), REG64(0));
} else {
rz_strbuf_appendf(&op->esil, "%s,0xffffffffffffffff,^,%s,&=", REG64(1), REG64(0));
if (ISREG64(1)) {
rz_strbuf_appendf(&op->esil, "%s,0xffffffffffffffff,^,%s,&=", REG64(1), REG64(0));
} else {
rz_strbuf_appendf(&op->esil, "0x%" PFMT64x ",0xffffffffffffffff,^,%s,&=", IMM64(1), REG64(0));
}
}
} else {
if (REGSIZE64(0) == 4) {
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13 changes: 13 additions & 0 deletions test/db/esil/arm_64
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Expand Up @@ -899,3 +899,16 @@ EXPECT=<<EOF
x0 = 0x0000000000000005
EOF
RUN

NAME=bic v0.4s, #0, lsl #24
FILE=malloc://0x200
CMDS=<<EOF
e asm.arch=arm
e asm.bits=64
wx 0x0074006f # bic v0.4s, #0, lsl #24
pie 1
EOF
EXPECT=<<EOF
0x00000000 0x0,0xffffffffffffffff,^,q0,&=
EOF
RUN
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