Vector indexed load/store th.vlxe/th.vxse only support same reg-mem pair

[imkiva]

Possible cause:

llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfoXTHeadVPseudos.td

Line 661 in 6c3eb2b

XVPseudoILoadNoMask<vreg, eew, eew, 0, 1>,

[imkiva]

********** REWRITE VIRTUAL REGISTERS **********
********** Function: intrinsic_vloxei_v_nxv8f16_nxv8f16_nxv8i8
********** REGISTER MAP **********
[%0 -> $x10] GPR
[%1 -> $v8] VR
[%2 -> $x11] GPRNoX0
[%3 -> $v8m2] VRM2
[%5 -> $v8m2] VRM2
[%6 -> $x12] GPR
[%7 -> $x13] GPR

0B	bb.0.entry:
	  liveins: $v8, $x10, $x11
16B	  %2:gprnox0 = COPY $x11
32B	  %6:gpr = CSRRS 3104, $x0
48B	  %7:gpr = CSRRS 3105, $x0
64B	  dead $x0 = PseudoTH_VSETVLIX0 $x0, 0, implicit-def $vl, implicit-def $vtype, implicit $vl
80B	  %1:vr = COPY $v8
112B	  %0:gpr = COPY $x10
120B	  dead $x0 = TH_VSETVL killed %6:gpr, killed %7:gpr, implicit-def $vtype, implicit-def $vl
128B	  %5:vrm2 = COPY killed %1:vr
144B	  dead $x0 = PseudoTH_VSETVLI killed %2:gprnox0, 5, implicit-def $vl, implicit-def $vtype
160B	  %3:vrm2 = PseudoTH_VLXE_V_E16_M2 undef %3:vrm2(tied-def 0), killed %0:gpr, killed %5:vrm2, $noreg, 4, implicit $vl, implicit $vtype :: (load unknown-size from %ir.0, align 2)
176B	  $v8m2 = COPY killed %3:vrm2
192B	  PseudoRET implicit $v8m2
> renamable $x11 = COPY $x11
Identity copy: renamable $x11 = COPY $x11
  deleted.
> renamable $x12 = CSRRS 3104, $x0
> renamable $x13 = CSRRS 3105, $x0
> dead $x0 = PseudoTH_VSETVLIX0 $x0, 0, implicit-def $vl, implicit-def $vtype, implicit $vl
> renamable $v8 = COPY $v8
Identity copy: renamable $v8 = COPY $v8
  deleted.
> renamable $x10 = COPY $x10
Identity copy: renamable $x10 = COPY $x10
  deleted.
> dead $x0 = TH_VSETVL killed renamable $x12, killed renamable $x13, implicit-def $vtype, implicit-def $vl
> renamable $v8m2 = COPY killed renamable $v8
> dead $x0 = PseudoTH_VSETVLI killed renamable $x11, 5, implicit-def $vl, implicit-def $vtype
> renamable $v8m2 = PseudoTH_VLXE_V_E16_M2 undef renamable $v8m2(tied-def 0), killed renamable $x10, killed renamable $v8m2, $noreg, 4, implicit $vl, implicit $vtype :: (load unknown-size from %ir.0, align 2)
> $v8m2 = COPY killed renamable $v8m2
Identity copy: $v8m2 = COPY killed renamable $v8m2
  deleted.
> PseudoRET implicit $v8m2
********** Stack Slot Coloring **********
********** Function: intrinsic_vloxei_v_nxv8f16_nxv8f16_nxv8i8
MCP: BackwardCopyPropagateBlock entry
MCP: ForwardCopyPropagateBlock entry
******** Post-regalloc Machine LICM: intrinsic_vloxei_v_nxv8f16_nxv8f16_nxv8i8 ********

block-frequency: intrinsic_vloxei_v_nxv8f16_nxv8f16_nxv8i8
==========================================================
reverse-post-order-traversal
 - 0: BB0[entry]
loop-detection
compute-mass-in-function
 - node: BB0[entry]
  => mass:  ffffffffffffffff
float-to-int: min = 1.0, max = 1.0, factor = 8.0
 - BB0[entry]: float = 1.0, scaled = 8.0, int = 8
block-frequency-info: intrinsic_vloxei_v_nxv8f16_nxv8f16_nxv8i8
 - BB0[entry]: float = 1.0, int = 8

		Looking for trivial roots
Found a new trivial root: %bb.0
Last visited node: %bb.0
		Looking for non-trivial roots
Total: 1, Num: 2
Discovered CFG nodes:
0: nullptr
1: nullptr
2: %bb.0
Found roots: %bb.0 
**** Analysing intrinsic_vloxei_v_nxv8f16_nxv8f16_nxv8i8
Look into: %bb.0
Nothing to shrink-wrap
MCP: BackwardCopyPropagateBlock entry
MCP: ForwardCopyPropagateBlock entry
Machine Function
********** EXPANDING POST-RA PSEUDO INSTRS **********
********** Function: intrinsic_vloxei_v_nxv8f16_nxv8f16_nxv8i8
Impossible reg-to-reg copy
UNREACHABLE executed at /home/kiva/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:439!
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.	Program arguments: /home/kiva/buildhost/bin/llc -mtriple=riscv64 -mattr=+a,+xtheadvector -debug vlx.ll
1.	Running pass 'Function Pass Manager' on module 'vlx.ll'.
2.	Running pass 'Post-RA pseudo instruction expansion pass' on function '@intrinsic_vloxei_v_nxv8f16_nxv8f16_nxv8i8'
 #0 0x00007f5975f416ba llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/kiva/llvm-project/llvm/lib/Support/Unix/Signals.inc:602:22
 #1 0x00007f5975f41a99 PrintStackTraceSignalHandler(void*) /home/kiva/llvm-project/llvm/lib/Support/Unix/Signals.inc:675:1
 #2 0x00007f5975f3f15d llvm::sys::RunSignalHandlers() /home/kiva/llvm-project/llvm/lib/Support/Signals.cpp:104:20
 #3 0x00007f5975f40fd3 SignalHandler(int) /home/kiva/llvm-project/llvm/lib/Support/Unix/Signals.inc:413:1
 #4 0x00007f5975629520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)
 #5 0x00007f597567d9fc pthread_kill (/lib/x86_64-linux-gnu/libc.so.6+0x969fc)
 #6 0x00007f5975629476 gsignal (/lib/x86_64-linux-gnu/libc.so.6+0x42476)
 #7 0x00007f597560f7f3 abort (/lib/x86_64-linux-gnu/libc.so.6+0x287f3)
 #8 0x00007f5975e0e97c bindingsErrorHandler(void*, char const*, bool) /home/kiva/llvm-project/llvm/lib/Support/ErrorHandling.cpp:221:55
 #9 0x00007f597be42178 llvm::RISCVInstrInfo::copyPhysReg(llvm::MachineBasicBlock&, llvm::MachineInstrBundleIterator<llvm::MachineInstr, false>, llvm::DebugLoc const&, llvm::MCRegister, llvm::MCRegister, bool) const /home/kiva/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:442:3
#10 0x00007f597a203f71 llvm::TargetInstrInfo::lowerCopy(llvm::MachineInstr*, llvm::TargetRegisterInfo const*) const /home/kiva/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp:745:14
#11 0x00007f597be43d39 llvm::RISCVInstrInfo::expandPostRAPseudo(llvm::MachineInstr&) const /home/kiva/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:730:19
#12 0x00007f5979b5067f (anonymous namespace)::ExpandPostRA::runOnMachineFunction(llvm::MachineFunction&) /home/kiva/llvm-project/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp:137:7
#13 0x00007f5979da944e llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /home/kiva/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:91:33
#14 0x00007f597698154c llvm::FPPassManager::runOnFunction(llvm::Function&) /home/kiva/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1435:20
#15 0x00007f5976981822 llvm::FPPassManager::runOnModule(llvm::Module&) /home/kiva/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1481:13
#16 0x00007f5976981c83 (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&) /home/kiva/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1550:20
#17 0x00007f597697c908 llvm::legacy::PassManagerImpl::run(llvm::Module&) /home/kiva/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:535:13
#18 0x00007f597698257b llvm::legacy::PassManager::run(llvm::Module&) /home/kiva/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1678:1
#19 0x0000559e19d93464 compileModule(char**, llvm::LLVMContext&) /home/kiva/llvm-project/llvm/tools/llc/llc.cpp:754:66
#20 0x0000559e19d90d5b main /home/kiva/llvm-project/llvm/tools/llc/llc.cpp:416:35
#21 0x00007f5975610d90 (/lib/x86_64-linux-gnu/libc.so.6+0x29d90)
#22 0x00007f5975610e40 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x29e40)
#23 0x0000559e19d8f9b5 _start (/home/kiva/buildhost/bin/llc+0x249b5)

[imkiva]

128B	  %5:vrm2 = COPY killed %1:vr

caused the impossible reg-to-reg copy