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SIMD Basic: rename const vars
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lamphamsy committed Dec 20, 2018
1 parent 31cb8c6 commit d28cb13
Showing 1 changed file with 10 additions and 9 deletions.
19 changes: 10 additions & 9 deletions src/simd_basic.h
Original file line number Diff line number Diff line change
Expand Up @@ -41,38 +41,39 @@ inline VecType card(T q);
template <>
inline VecType card<uint16_t>(uint16_t q)
{
return F3_U16;
return vec16_f3;
}
template <>
inline VecType card<uint32_t>(uint32_t q)
{
return (q == F3) ? F3_U32 : F4_U32;
return (q == F3) ? vec32_f3 : vec32_f4;
}

template <typename T>
inline VecType card_minus_one(T q);
template <>
inline VecType card_minus_one<uint16_t>(uint16_t q)
{
return F3_MINUS_ONE_U16;
return vec16_f3_minus_one;
}
template <>
inline VecType card_minus_one<uint32_t>(uint32_t q)
{
return (q == F3) ? F3_MINUS_ONE_U32 : F4_MINUS_ONE_U32;
return (q == F3) ? vec32_f3_minus_one : vec32_f4_minus_one;
}

template <typename T>
inline VecType get_low_half(VecType x, T q)
{
return (q == F3) ? BLEND8(ZERO, x, MASK8_LO) : BLEND16(ZERO, x, 0x55);
return (q == F3) ? BLEND8(vec_zero, x, vec16_128)
: BLEND16(vec_zero, x, 0x55);
}

template <typename T>
inline VecType get_high_half(VecType x, T q)
{
return (q == F3) ? BLEND8(ZERO, SHIFTR(x, 1), MASK8_LO)
: BLEND16(ZERO, SHIFTR(x, 2), 0x55);
return (q == F3) ? BLEND8(vec_zero, SHIFTR(x, 1), vec16_128)
: BLEND16(vec_zero, SHIFTR(x, 2), 0x55);
}

/* ================= Basic Operations ================= */
Expand Down Expand Up @@ -164,8 +165,8 @@ inline VecType mod_mul_safe(VecType x, VecType y, T q)
if (is_zero(cmp)) {
return res;
}
return (q == F3) ? bit_xor(res, bit_and(F4_U32, cmp))
: add<T>(res, bit_and(ONE_U32, cmp));
return (q == F3) ? bit_xor(res, bit_and(vec32_f4, cmp))
: add<T>(res, bit_and(vec32_one, cmp));
}

/**
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