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idf_build_get_property(target IDF_TARGET) | ||
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if(${target} STREQUAL "linux") | ||
return() # This component is not supported by the POSIX/Linux simulator | ||
endif() | ||
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set(srcs "src/esp_lcd_common.c" | ||
"src/esp_lcd_panel_io.c" | ||
"src/esp_lcd_panel_io_i2c_v1.c" | ||
"src/esp_lcd_panel_io_i2c_v2.c" | ||
"src/esp_lcd_panel_io_spi.c" | ||
"src/esp_lcd_panel_nt35510.c" | ||
"src/esp_lcd_panel_ssd1306.c" | ||
"src/esp_lcd_panel_st7789.c" | ||
"src/esp_lcd_panel_ops.c") | ||
set(includes "include" "interface") | ||
set(priv_requires "esp_mm" "esp_psram") | ||
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if(CONFIG_SOC_I2S_LCD_I80_VARIANT) | ||
list(APPEND srcs "src/esp_lcd_panel_io_i2s.c") | ||
endif() | ||
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if(CONFIG_SOC_LCDCAM_SUPPORTED) | ||
list(APPEND srcs "src/esp_lcd_panel_io_i80.c" "src/esp_lcd_panel_rgb.c") | ||
endif() | ||
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idf_component_register(SRCS ${srcs} | ||
INCLUDE_DIRS ${includes} | ||
PRIV_REQUIRES ${priv_requires} | ||
REQUIRES driver | ||
LDFRAGMENTS linker.lf) |
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menu "LCD and Touch Panel" | ||
comment "LCD Touch Drivers are maintained in the IDF Component Registry" | ||
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menu "LCD Peripheral Configuration" | ||
config LCD_PANEL_IO_FORMAT_BUF_SIZE | ||
int "LCD panel io format buffer size" | ||
default 32 | ||
help | ||
LCD driver allocates an internal buffer to transform the data into a proper format, because of | ||
the endian order mismatch. This option is to set the size of the buffer, in bytes. | ||
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config LCD_ENABLE_DEBUG_LOG | ||
bool "Enable debug log" | ||
default n | ||
help | ||
Wether to enable the debug log message for LCD driver. | ||
Note that, this option only controls the LCD driver log, won't affect other drivers. | ||
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if SOC_LCD_RGB_SUPPORTED | ||
config LCD_RGB_ISR_IRAM_SAFE | ||
bool "RGB LCD ISR IRAM-Safe" | ||
default n | ||
help | ||
Ensure the LCD interrupt is IRAM-Safe by allowing the interrupt handler to be | ||
executable when the cache is disabled (e.g. SPI Flash write). | ||
If you want the LCD driver to keep flushing the screen even when cache ops disabled, | ||
you can enable this option. Note, this will also increase the IRAM usage. | ||
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config LCD_RGB_RESTART_IN_VSYNC | ||
bool "Restart transmission in VSYNC" | ||
default n | ||
select GDMA_CTRL_FUNC_IN_IRAM # need to restart GDMA in the LCD ISR | ||
help | ||
Reset the GDMA channel every VBlank to stop permanent desyncs from happening. | ||
Only need to enable it when in your application, the DMA can't deliver data | ||
as fast as the LCD consumes it. | ||
endif # SOC_LCD_RGB_SUPPORTED | ||
endmenu | ||
endmenu |
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# esp_lcd Driver Design | ||
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## Class Diagram | ||
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`esp_lcd` driver focuses on two parts: panel driver and IO driver. The panel driver is a bunch of operations on the **frame-buffer**, no matter where the frame-buffer is located. The IO driver is mainly consumed by the controller-based LCD panel drivers (e.g. ST7789). Usually such LCD controller can support various IO interfaces (e.g. I80, SPI, I2C, etc). So we define an abstract interface for the IO driver. | ||
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```mermaid | ||
classDiagram | ||
class esp_lcd_panel_t { | ||
<<interface>> | ||
+reset() esp_err_t | ||
+init() esp_err_t | ||
+draw_bitmap(int x_start, int y_start, int x_end, int y_end, const void *color_data) esp_err_t | ||
+mirror(bool x_axis, bool y_axis) esp_err_t | ||
+swap_xy(bool swap_axes) esp_err_t | ||
+set_gap(int x_gap, int y_gap) esp_err_t | ||
+invert_color(bool invert_color_data) esp_err_t | ||
+disp_on_off(bool on_off) esp_err_t | ||
} | ||
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esp_lcd_rgb_panel_t --|> esp_lcd_panel_t : Inheritance | ||
class esp_lcd_rgb_panel_t { | ||
-int panel_id | ||
-size_t data_width | ||
-int disp_gpio | ||
-intr_handle_t intr | ||
-uint8_t* frame_buffer | ||
-gdma_channel_handle_t gdma_channel | ||
-dma_descriptor_t* dma_nodes | ||
-on_vsync(void* user_data) bool | ||
} | ||
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esp_lcd_panel_model_t --|> esp_lcd_panel_t : Inheritance | ||
esp_lcd_panel_model_t "1" --> "1" esp_lcd_panel_io_t : Use | ||
class esp_lcd_panel_model_t { | ||
-esp_lcd_panel_io_t* io | ||
-int reset_gpio_num | ||
} | ||
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class esp_lcd_panel_io_t { | ||
<<interface>> | ||
+rx_param(int lcd_cmd, void *param, size_t param_size) | ||
+tx_param(int lcd_cmd, const void *param, size_t param_size) | ||
+tx_color(int lcd_cmd, const void *color, size_t color_size) | ||
} | ||
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esp_lcd_panel_io_i2c_t --|> esp_lcd_panel_io_t : Inheritance | ||
class esp_lcd_panel_io_i2c_t { | ||
-int i2c_bus_id | ||
-int ctrl_phase_cmd | ||
-int ctrl_phase_data | ||
-on_color_trans_done(void* user_data) bool | ||
} | ||
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esp_lcd_panel_io_spi_t --|> esp_lcd_panel_io_t : Inheritance | ||
class esp_lcd_panel_io_spi_t { | ||
-spi_device_handle_t spi_dev | ||
-int dc_gpio_num | ||
-spi_transaction_t trans_worker | ||
-on_color_trans_done(void* user_data) bool | ||
} | ||
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esp_lcd_panel_io_i80_t --|> esp_lcd_panel_io_t : Inheritance | ||
class esp_lcd_panel_io_i80_t { | ||
-esp_lcd_i80_bus_t* bus | ||
-int cs_gpio_num | ||
-int dc_level | ||
-size_t pclk_hz | ||
-QueueHandle_t trans_queue | ||
-QueueHandle_t done_queue | ||
-on_color_trans_done(void* user_data) bool | ||
} | ||
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esp_lcd_i80_bus_t "1" --> "1..*" esp_lcd_panel_io_i80_t : Has | ||
class esp_lcd_i80_bus_t { | ||
-int bus_id | ||
-size_t data_width | ||
-intr_handle_t intr | ||
-gdma_cannel_handle_t dma_chan | ||
-dma_descriptor_t* dma_nodes | ||
-list_t i80_devices | ||
} | ||
``` |
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54
tulip/esp32s3/components/esp_lcd/include/esp_lcd_panel_commands.h
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/* | ||
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
#pragma once | ||
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/* Common LCD panel commands */ | ||
#define LCD_CMD_NOP 0x00 // This command is empty command | ||
#define LCD_CMD_SWRESET 0x01 // Software reset registers (the built-in frame buffer is not affected) | ||
#define LCD_CMD_RDDID 0x04 // Read 24-bit display ID | ||
#define LCD_CMD_RDDST 0x09 // Read display status | ||
#define LCD_CMD_RDDPM 0x0A // Read display power mode | ||
#define LCD_CMD_RDD_MADCTL 0x0B // Read display MADCTL | ||
#define LCD_CMD_RDD_COLMOD 0x0C // Read display pixel format | ||
#define LCD_CMD_RDDIM 0x0D // Read display image mode | ||
#define LCD_CMD_RDDSM 0x0E // Read display signal mode | ||
#define LCD_CMD_RDDSR 0x0F // Read display self-diagnostic result | ||
#define LCD_CMD_SLPIN 0x10 // Go into sleep mode (DC/DC, oscillator, scanning stopped, but memory keeps content) | ||
#define LCD_CMD_SLPOUT 0x11 // Exit sleep mode | ||
#define LCD_CMD_PTLON 0x12 // Turns on partial display mode | ||
#define LCD_CMD_NORON 0x13 // Turns on normal display mode | ||
#define LCD_CMD_INVOFF 0x20 // Recover from display inversion mode | ||
#define LCD_CMD_INVON 0x21 // Go into display inversion mode | ||
#define LCD_CMD_GAMSET 0x26 // Select Gamma curve for current display | ||
#define LCD_CMD_DISPOFF 0x28 // Display off (disable frame buffer output) | ||
#define LCD_CMD_DISPON 0x29 // Display on (enable frame buffer output) | ||
#define LCD_CMD_CASET 0x2A // Set column address | ||
#define LCD_CMD_RASET 0x2B // Set row address | ||
#define LCD_CMD_RAMWR 0x2C // Write frame memory | ||
#define LCD_CMD_RAMRD 0x2E // Read frame memory | ||
#define LCD_CMD_PTLAR 0x30 // Define the partial area | ||
#define LCD_CMD_VSCRDEF 0x33 // Vertical scrolling definition | ||
#define LCD_CMD_TEOFF 0x34 // Turns off tearing effect | ||
#define LCD_CMD_TEON 0x35 // Turns on tearing effect | ||
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#define LCD_CMD_MADCTL 0x36 // Memory data access control | ||
#define LCD_CMD_MH_BIT (1 << 2) // Display data latch order, 0: refresh left to right, 1: refresh right to left | ||
#define LCD_CMD_BGR_BIT (1 << 3) // RGB/BGR order, 0: RGB, 1: BGR | ||
#define LCD_CMD_ML_BIT (1 << 4) // Line address order, 0: refresh top to bottom, 1: refresh bottom to top | ||
#define LCD_CMD_MV_BIT (1 << 5) // Row/Column order, 0: normal mode, 1: reverse mode | ||
#define LCD_CMD_MX_BIT (1 << 6) // Column address order, 0: left to right, 1: right to left | ||
#define LCD_CMD_MY_BIT (1 << 7) // Row address order, 0: top to bottom, 1: bottom to top | ||
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#define LCD_CMD_VSCSAD 0x37 // Vertical scroll start address | ||
#define LCD_CMD_IDMOFF 0x38 // Recover from IDLE mode | ||
#define LCD_CMD_IDMON 0x39 // Fall into IDLE mode (8 color depth is displayed) | ||
#define LCD_CMD_COLMOD 0x3A // Defines the format of RGB picture data | ||
#define LCD_CMD_RAMWRC 0x3C // Memory write continue | ||
#define LCD_CMD_RAMRDC 0x3E // Memory read continue | ||
#define LCD_CMD_STE 0x44 // Set tear scan line, tearing effect output signal when display module reaches line N | ||
#define LCD_CMD_GDCAN 0x45 // Get scan line | ||
#define LCD_CMD_WRDISBV 0x51 // Write display brightness | ||
#define LCD_CMD_RDDISBV 0x52 // Read display brightness value |
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