variant(wb55): add STeaMi board

README.md

@@ -88,6 +88,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
  - [Midatronics boards](#midatronics-boards)
  - [SparkFun boards](#sparkfun-boards)
  - [ELV Boards](#elv-boards)
+ - [STeaMi board](#steami-board)
 
 > [!Note]
 > - :green_heart: board support is available since the specified release version.
@@ -865,6 +866,11 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :----: | :-------: | ---- | :-----: | :---- |
 | :green_heart:  | STM32WLE5JB | ELV-BM-TRX1 | *2.8.0* |  |
 
+### [STeaMi Board](https://www.steami.cc/)
+
+| Status | Device(s) | Name | Release | Notes |
+| :----: | :-------: | ---- | :-----: | :---- |
+| :yellow_heart:  | STM32WB55RGV | [STeaMi](https://www.steami.cc/) | **2.9.0** |  |
 ## Next release
 
 See [milestones](https://github.com/stm32duino/Arduino_Core_STM32/milestones) to have an overview of the next release content.

boards.txt

@@ -13630,6 +13630,47 @@ ELV_Modular_System.menu.upload_method.serialMethod.upload.protocol=serial
 ELV_Modular_System.menu.upload_method.serialMethod.upload.options=-c {serial.port.file}
 ELV_Modular_System.menu.upload_method.serialMethod.upload.tool=stm32CubeProg
 
+################################################################################
+# STeaMi board
+STeaMi.name=STeaMi Board
+STeaMi.build.core=arduino
+STeaMi.build.variant_h=variant_{build.board}.h
+STeaMi.build.st_extra_flags=-D{build.product_line} {build.xSerial}
+STeaMi.build.flash_offset=0x0
+STeaMi.upload.maximum_size=0
+STeaMi.upload.maximum_data_size=0
+STeaMi.vid.0=0x0d28
+STeaMi.pid.0=0x0204
+
+STeaMi.menu.pnum.STEAM32_WB55RG=STeaMi
+STeaMi.menu.pnum.STEAM32_WB55RG.node="STeaMi,DAPLINK"
+STeaMi.menu.pnum.STEAM32_WB55RG.upload.maximum_size=524288
+STeaMi.menu.pnum.STEAM32_WB55RG.upload.maximum_data_size=196608
+STeaMi.menu.pnum.STEAM32_WB55RG.build.mcu=cortex-m4
+STeaMi.menu.pnum.STEAM32_WB55RG.build.fpu=-mfpu=fpv4-sp-d16
+STeaMi.menu.pnum.STEAM32_WB55RG.build.float-abi=-mfloat-abi=hard
+STeaMi.menu.pnum.STEAM32_WB55RG.build.board=STEAM32_WB55RG
+STeaMi.menu.pnum.STEAM32_WB55RG.build.series=STM32WBxx
+STeaMi.menu.pnum.STEAM32_WB55RG.build.product_line=STM32WB55xx
+STeaMi.menu.pnum.STEAM32_WB55RG.build.variant=STM32WBxx/WB55R(C-E-G)V
+STeaMi.menu.pnum.STEAM32_WB55RG.debug.server.openocd.scripts.0=interface/cmsis-dap.cfg
+STeaMi.menu.pnum.STEAM32_WB55RG.debug.server.openocd.scripts.1={runtime.platform.path}/debugger/select_swd.cfg
+STeaMi.menu.pnum.STEAM32_WB55RG.openocd.target=stm32wbx
+STeaMi.menu.pnum.STEAM32_WB55RG.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
+
+# Upload menu
+STeaMi.menu.upload_method.MassStorage=Mass Storage
+STeaMi.menu.upload_method.MassStorage.upload.protocol=
+STeaMi.menu.upload_method.MassStorage.upload.tool=massStorageCopy
+
+STeaMi.menu.upload_method.OpenOCDDapLink=OpenOCD DapLink (SWD)
+STeaMi.menu.upload_method.OpenOCDDapLink.upload.protocol=cmsis-dap
+STeaMi.menu.upload_method.OpenOCDDapLink.upload.tool=openocd_upload
+
+STeaMi.menu.upload_method.OpenOCDSTLink=OpenOCD STLink (SWD)
+STeaMi.menu.upload_method.OpenOCDSTLink.upload.protocol=stlink
+STeaMi.menu.upload_method.OpenOCDSTLink.upload.tool=openocd_upload
+
 ################################################################################
 # Serialx activation
 Nucleo_144.menu.xserial.generic=Enabled (generic 'Serial')
@@ -13862,6 +13903,12 @@ ELV_Modular_System.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DH
 ELV_Modular_System.menu.xserial.disabled=Disabled (no Serial support)
 ELV_Modular_System.menu.xserial.disabled.build.xSerial=
 
+STeaMi.menu.xserial.generic=Enabled (generic 'Serial')
+STeaMi.menu.xserial.none=Enabled (no generic 'Serial')
+STeaMi.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
+STeaMi.menu.xserial.disabled=Disabled (no Serial support)
+STeaMi.menu.xserial.disabled.build.xSerial=
+
 # USB connectivity
 Nucleo_144.menu.usb.none=None
 Nucleo_144.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART)
@@ -14961,6 +15008,26 @@ ELV_Modular_System.menu.opt.ogstd.build.flags.optimize=-Og
 ELV_Modular_System.menu.opt.o0std=No Optimization (-O0)
 ELV_Modular_System.menu.opt.o0std.build.flags.optimize=-O0
 
+STeaMi.menu.opt.osstd=Smallest (-Os default)
+STeaMi.menu.opt.oslto=Smallest (-Os) with LTO
+STeaMi.menu.opt.oslto.build.flags.optimize=-Os -flto
+STeaMi.menu.opt.o1std=Fast (-O1)
+STeaMi.menu.opt.o1std.build.flags.optimize=-O1
+STeaMi.menu.opt.o1lto=Fast (-O1) with LTO
+STeaMi.menu.opt.o1lto.build.flags.optimize=-O1 -flto
+STeaMi.menu.opt.o2std=Faster (-O2)
+STeaMi.menu.opt.o2std.build.flags.optimize=-O2
+STeaMi.menu.opt.o2lto=Faster (-O2) with LTO
+STeaMi.menu.opt.o2lto.build.flags.optimize=-O2 -flto
+STeaMi.menu.opt.o3std=Fastest (-O3)
+STeaMi.menu.opt.o3std.build.flags.optimize=-O3
+STeaMi.menu.opt.o3lto=Fastest (-O3) with LTO
+STeaMi.menu.opt.o3lto.build.flags.optimize=-O3 -flto
+STeaMi.menu.opt.ogstd=Debug (-Og)
+STeaMi.menu.opt.ogstd.build.flags.optimize=-Og
+STeaMi.menu.opt.o0std=No Optimization (-O0)
+STeaMi.menu.opt.o0std.build.flags.optimize=-O0
+
 # Debug information
 Nucleo_144.menu.dbg.none=None
 Nucleo_144.menu.dbg.enable_sym=Symbols Enabled (-g)
@@ -15254,6 +15321,14 @@ ELV_Modular_System.menu.dbg.enable_log.build.flags.debug=
 ELV_Modular_System.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g)
 ELV_Modular_System.menu.dbg.enable_all.build.flags.debug=-g
 
+STeaMi.menu.dbg.none=None
+STeaMi.menu.dbg.enable_sym=Symbols Enabled (-g)
+STeaMi.menu.dbg.enable_sym.build.flags.debug=-g -DNDEBUG
+STeaMi.menu.dbg.enable_log=Core logs Enabled
+STeaMi.menu.dbg.enable_log.build.flags.debug=
+STeaMi.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g)
+STeaMi.menu.dbg.enable_all.build.flags.debug=-g
+
 # C Runtime Library
 Nucleo_144.menu.rtlib.nano=Newlib Nano (default)
 Nucleo_144.menu.rtlib.nanofp=Newlib Nano + Float Printf
@@ -15624,3 +15699,13 @@ ELV_Modular_System.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
 ELV_Modular_System.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
 ELV_Modular_System.menu.rtlib.full=Newlib Standard
 ELV_Modular_System.menu.rtlib.full.build.flags.ldspecs=
+
+STeaMi.menu.rtlib.nano=Newlib Nano (default)
+STeaMi.menu.rtlib.nanofp=Newlib Nano + Float Printf
+STeaMi.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float
+STeaMi.menu.rtlib.nanofs=Newlib Nano + Float Scanf
+STeaMi.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float
+STeaMi.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
+STeaMi.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
+STeaMi.menu.rtlib.full=Newlib Standard
+STeaMi.menu.rtlib.full.build.flags.ldspecs=

cmake/boards_db.cmake

@@ -108286,6 +108286,60 @@ target_compile_options(ST3DP001_EVAL_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
+# STEAM32_WB55RG
+# -----------------------------------------------------------------------------
+
+set(STEAM32_WB55RG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB55R(C-E-G)V")
+set(STEAM32_WB55RG_MAXSIZE 524288)
+set(STEAM32_WB55RG_MAXDATASIZE 196608)
+set(STEAM32_WB55RG_MCU cortex-m4)
+set(STEAM32_WB55RG_FPCONF "fpv4-sp-d16-hard")
+add_library(STEAM32_WB55RG INTERFACE)
+target_compile_options(STEAM32_WB55RG INTERFACE
+  "SHELL:-DSTM32WB55xx "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${STEAM32_WB55RG_MCU}
+)
+target_compile_definitions(STEAM32_WB55RG INTERFACE
+  "STM32WBxx"
+	"ARDUINO_STEAM32_WB55RG"
+	"BOARD_NAME=\"STEAM32_WB55RG\""
+	"BOARD_ID=STEAM32_WB55RG"
+	"VARIANT_H=\"variant_STEAM32_WB55RG.h\""
+)
+target_include_directories(STEAM32_WB55RG INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/
+  ${STEAM32_WB55RG_VARIANT_PATH}
+)
+
+target_link_options(STEAM32_WB55RG INTERFACE
+  "LINKER:--default-script=${STEAM32_WB55RG_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=196608"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${STEAM32_WB55RG_MCU}
+)
+
+add_library(STEAM32_WB55RG_serial_disabled INTERFACE)
+target_compile_options(STEAM32_WB55RG_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(STEAM32_WB55RG_serial_generic INTERFACE)
+target_compile_options(STEAM32_WB55RG_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(STEAM32_WB55RG_serial_none INTERFACE)
+target_compile_options(STEAM32_WB55RG_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+
 # STEVAL_MKBOXPRO
 # -----------------------------------------------------------------------------
 

cmake/scripts/update_boarddb.py

@@ -13,7 +13,7 @@ def get_fpconf(config):
 
 
 def boardstxt_filter(key):
-    # Remove menu entry labels
+    # Remove menu entry labels and oopenocd config if any
     # In our data model, they conflict with the actual configuration
     # they are associated to
     # i.e. Nucleo_144.menu.pnum.NUCLEO_F207ZG would be both
@@ -22,7 +22,8 @@ def boardstxt_filter(key):
 
     if key[-1] == "svd_file":
         return True
-
+    if len(key) >= 5 and key[-2] == "scripts" and key[-3] == "openocd":
+        return True
     if key[0] == "menu":
         # menu.xserial=U(S)ART support
         return True

debugger/select_swd.cfg

@@ -0,0 +1,9 @@
+transport select swd
+
+set ENABLE_LOW_POWER 1
+set STOP_WATCHDOG 1
+set CLOCK_FREQ 4000
+
+reset_config none separate
+
+set CONNECT_UNDER_RESET 1

variants/STM32WBxx/WB55R(C-E-G)V/CMakeLists.txt

@@ -23,6 +23,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
   PeripheralPins.c
   variant_generic.cpp
   variant_P_NUCLEO_WB55RG.cpp
+  variant_STEAM32_WB55RG.cpp
 )
 target_link_libraries(variant_bin PUBLIC variant_usage)
 

variants/STM32WBxx/WB55R(C-E-G)V/variant_STEAM32_WB55RG.cpp

@@ -0,0 +1,160 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#include "variant_STEAM32_WB55RG.h"
+
+#if defined(ARDUINO_STEAM32_WB55RG)
+#include "lock_resource.h"
+#include "pins_arduino.h"
+
+// Pin number
+const PinName digitalPin[] = {
+  PC_4,   // P0/D0/A1
+  PA_5,   // P1/D1/A3
+  PC_5,   // P2/D2/A5
+  PA_2,   // P3/D3/A0
+  PA_4,   // P4/D4/A2
+  PA_7,   // P5/D5
+  PC_3,   // P6/D6
+  PA_9,   // P7/D7
+  PA_15,  // P8/D8
+  PC_2,   // P9/D9
+  PA_6,   // P10/D10/A4
+  PA_8,   // P11/D11
+  PC_6,   // P12/D12
+  PB_13,  // P13/D13
+  PB_14,  // P14/D14
+  PB_15,  // P15/D15
+  PE_4,   // P16/D16
+  PC_0,   // P19/D17
+  PC_1,   // P20/D18
+  PB_2,   // D19
+  PD_0,   // D20
+  PB_8,   // D21
+  PB_9,   // D22
+  PC_13,  // D23
+  PB_12,  // D24
+  PB_0,   // D25
+  PD_1,   // D26
+  PB_6,   // D27
+  PB_7,   // D28
+  PC_10,  // D29
+  PH_3,   // D30
+  PC_11,  // D31
+  PC_12,  // D32
+  PA_0,   // D33
+  PA_3,   // D34
+  PA_10,  // D35
+  PA_12,  // D36
+  PB_1,   // D37
+  PB_10,  // D38
+  PB_11,  // D39
+  PA_11,  // D40
+  PB_4,   // D41
+  PB_5,   // D42
+  PA_1,   // D43
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+  3,   // A0
+  0,   // A1
+  4,   // A2
+  1,   // A3
+  10,  // A4
+  2    // A5
+};
+
+// ----------------------------------------------------------------------------
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief  System Clock Configuration
+ * @param  None
+ * @retval None
+ */
+WEAK void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct         = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct         = {};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
+
+  /* This prevents concurrent access to RCC registers by CPU2 (M0+) */
+  hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+
+  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */
+  hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+
+  /* Initializes the CPU, AHB and APB busses clocks */
+  RCC_OscInitStruct.OscillatorType =
+    RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE;
+  RCC_OscInitStruct.HSEState            = RCC_HSE_ON;
+  RCC_OscInitStruct.LSEState            = RCC_LSE_ON;
+  RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
+  RCC_OscInitStruct.HSI48State          = RCC_HSI48_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM            = RCC_PLLM_DIV2;
+  RCC_OscInitStruct.PLL.PLLN            = 16;
+  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLR            = RCC_PLLR_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ            = RCC_PLLQ_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /* Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
+                                RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_HSE;
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /* Initializes the peripherals clocks */
+  /* RNG needs to be configured like in M0 core, i.e. with HSI48 */
+  PeriphClkInitStruct.PeriphClockSelection =
+    RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB;
+  PeriphClkInitStruct.UsbClockSelection      = RCC_USBCLKSOURCE_HSI48;
+  PeriphClkInitStruct.RngClockSelection      = RCC_RNGCLKSOURCE_HSI48;
+  PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+  PeriphClkInitStruct.SmpsClockSelection     = RCC_SMPSCLKSOURCE_HSE;
+  PeriphClkInitStruct.SmpsDivSelection       = RCC_SMPSCLKDIV_RANGE1;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
+  LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
+  LL_PWR_SMPS_Enable();
+
+  /* Select HSI as system clock source after Wake Up from Stop mode */
+  LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+
+  hsem_unlock(CFG_HW_RCC_SEMID);
+}
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* ARDUINO_STEAM32_WB55RG */