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[rtl] reset SDA and SCL of TWI and TWD to '1' (#1167)
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stnolting authored Jan 23, 2025
2 parents 0172013 + 4298ad5 commit 5421f98
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1 change: 1 addition & 0 deletions CHANGELOG.md
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Expand Up @@ -29,6 +29,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12

| Date | Version | Comment | Ticket |
|:----:|:-------:|:--------|:------:|
| 23.01.2025 | 1.11.0.1 | reset SDA and SCL of TWI and TWD modules to `1` | [#1167](https://github.com/stnolting/neorv32/pull/1167) |
| 22.01.2025 | [**:rocket:1.11.0**](https://github.com/stnolting/neorv32/releases/tag/v1.11.0) | **New release** | |
| 22.01.2025 | 1.10.9.10 | :bug: fix TWD ACK/NACK sampling | [#1165](https://github.com/stnolting/neorv32/pull/1165) |
| 18.01.2025 | 1.10.9.9 | atomic memory access updates and improvements | [#1163](https://github.com/stnolting/neorv32/pull/1163) |
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2 changes: 1 addition & 1 deletion rtl/core/neorv32_package.vhd
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Expand Up @@ -29,7 +29,7 @@ package neorv32_package is

-- Architecture Constants -----------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01110000"; -- hardware version
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01110001"; -- hardware version
constant archid_c : natural := 19; -- official RISC-V architecture ID
constant XLEN : natural := 32; -- native data path width

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8 changes: 4 additions & 4 deletions rtl/core/neorv32_twd.vhd
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Expand Up @@ -264,8 +264,8 @@ begin
synchronizer: process(rstn_i, clk_i)
begin
if (rstn_i = '0') then
smp.sda_sreg <= (others => '0');
smp.scl_sreg <= (others => '0');
smp.sda_sreg <= (others => '1');
smp.scl_sreg <= (others => '1');
smp.valid <= '0';
elsif rising_edge(clk_i) then
-- input register --
Expand Down Expand Up @@ -293,8 +293,8 @@ begin
bus_event: process(rstn_i, clk_i)
begin
if (rstn_i = '0') then
smp.sda <= '0';
smp.scl <= '0';
smp.sda <= '1';
smp.scl <= '1';
smp.scl_rise <= '0';
smp.scl_fall <= '0';
smp.start <= '0';
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4 changes: 2 additions & 2 deletions rtl/core/neorv32_twi.vhd
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Expand Up @@ -298,8 +298,8 @@ begin
if (rstn_i = '0') then
io_con.sda_in_ff <= (others => '0');
io_con.scl_in_ff <= (others => '0');
io_con.sda_out <= '0';
io_con.scl_out <= '0';
io_con.sda_out <= '1';
io_con.scl_out <= '1';
engine.state <= (others => '0');
engine.bitcnt <= (others => '0');
engine.sreg <= (others => '0');
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