[rtl] upgrade neoTRNG to version 3

CHANGELOG.md

@@ -32,6 +32,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12
 
 | Date (*dd.mm.yyyy*) | Version | Comment |
 |:-------------------:|:-------:|:--------|
+| 04.11.2023 | 1.9.0.7 | upgrade true random number generator to [neoTRNG version 3](https://github.com/stnolting/neoTRNG); [#721](https://github.com/stnolting/neorv32/pull/721) |
 | 31.10.2023 | 1.9.0.6 | update crt0's early-boot trap handler; [#719](https://github.com/stnolting/neorv32/pull/719) |
 | 30.10.2023 | 1.9.0.5 | minor rtl cleanups and code beautification; [#718](https://github.com/stnolting/neorv32/pull/718) |
 | 28.10.2023 | 1.9.0.4 | :warning: :sparkles: move FreeRTOS port and demo to a new repository: https://github.com/stnolting/neorv32-freertos; [#716](https://github.com/stnolting/neorv32/pull/716) |

docs/datasheet/soc_trng.adoc

@@ -17,26 +17,27 @@
 
 **Overview**
 
-The NEORV32 true random number generator provides _physically_ true random numbers.
-Instead of using a pseudo RNG like a LFSR, the TRNG uses a simple, straight-forward ring
-oscillator concept as physical entropy source. Hence, voltage, thermal and also semiconductor manufacturing
-fluctuations are used to provide a true physical entropy source.
+The NEORV32 true random number generator provides _physically_ true random numbers. It is based on free-running
+ring-oscillators that generate **phase noise** when being sampled by a constant clock. This phase noise is
+used as physical entropy source. The TRNG features a platform independent architecture without FPGA-specific
+primitives, macros or attributes so it can be synthesized for _any_ FPGA. 
 
-The TRNG features a platform independent architecture without FPGA-specific primitives, macros or
-attributes so it can be synthesized for _any_ FPGA. It is based on the **neoTRNG V2**, which is a "spin-off project" of the
-NEORV32 processor. More detailed information about the neoTRNG, its architecture and a
-detailed evaluation of the random number quality can be found it the neoTRNG repository: https://github.com/stnolting/neoTRNG
+.In-Depth Documentation
+[TIP]
+For more information about the neoTRNG architecture and an analysis of its random quality check out the
+neoTRNG repository: https://github.com/stnolting/neoTRNG
 
 .Inferring Latches
 [NOTE]
-The synthesis tool might emit a warning like "inferring latches for ... neorv32_trng ...". This is no problem
-as this is what we actually want: the TRNG is based on latches, which implement the inverters of the ring oscillators.
+The synthesis tool might emit warnings regarding **inferred latches** or **combinatorial loops**. However, this
+is not design flaw as this is exactly what we want. ;)
 
 .Simulation
 [IMPORTANT]
-When simulating the processor the NEORV32 TRNG is automatically set to "simulation mode". In this mode, the physical entropy
-sources (= the ring oscillators) are replaced by a simple **pseudo RNG (LFSR)** providing weak pseudo-random data only.
-The `TRNG_CTRL_SIM_MODE` flag of the control register is set if simulation mode is active.
+When simulating the processor the TRNG is automatically set to "simulation mode". In this mode the physical entropy
+sources (the ring oscillators) are replaced by a simple **pseudo RNG** based on a LFSR providing only
+**deterministic pseudo-random** data. The `TRNG_CTRL_SIM_MODE` flag of the control register is set if simulation
+mode is active.
 
 
 **Theory of Operation**

rtl/core/neorv32_package.vhd

@@ -59,7 +59,7 @@ package neorv32_package is
 
   -- Architecture Constants -----------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01090006"; -- hardware version
+  constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01090007"; -- hardware version
   constant archid_c     : natural := 19; -- official RISC-V architecture ID
   constant XLEN         : natural := 32; -- native data path width, do not change!