detect/x86_64: Remove extra cfgs

compile_error! has already ensured that this module is not enabled on Miri and SGX.
taiki-e · Aug 26, 2023 · f49051b · f49051b
1 parent 16eecbf
commit f49051b
Showing 1 changed file with 24 additions and 34 deletions.
diff --git a/src/imp/atomic128/detect/x86_64.rs b/src/imp/atomic128/detect/x86_64.rs
@@ -5,13 +5,13 @@
 // Miri doesn't support inline assembly used in __cpuid: https://github.com/rust-lang/miri/issues/932
 // SGX doesn't support CPUID: https://github.com/rust-lang/stdarch/blob/a0c30f3e3c75adcd6ee7efc94014ebcead61c507/crates/core_arch/src/x86/cpuid.rs#L102-L105
 #[cfg(any(target_env = "sgx", miri))]
-compile_error!("internal error: this module is not supported on this target");
+compile_error!("internal error: this module is not supported on this environment");
 
 include!("common.rs");
 
 #[cfg(not(portable_atomic_no_asm))]
 use core::arch::asm;
-use core::arch::x86_64::CpuidResult;
+use core::arch::x86_64::{CpuidResult, _xgetbv};
 
 // Workaround for https://github.com/rust-lang/rust/issues/101346
 // It is not clear if our use cases are affected, but we implement this just in case.
@@ -57,38 +57,31 @@ unsafe fn _vendor_id() -> [u8; 12] {
 
 #[cold]
 fn _detect(info: &mut CpuInfo) {
-    // Miri doesn't support inline assembly used in __cpuid
-    // SGX doesn't support CPUID: https://github.com/rust-lang/stdarch/blob/a0c30f3e3c75adcd6ee7efc94014ebcead61c507/crates/core_arch/src/x86/cpuid.rs#L102-L105
-    #[cfg(not(any(target_env = "sgx", miri)))]
-    {
-        use core::arch::x86_64::_xgetbv;
+    // SAFETY: Calling `_vendor_id`` is safe because the CPU has `cpuid` support.
+    let vendor_id = unsafe { _vendor_id() };
 
-        // SAFETY: Calling `_vendor_id`` is safe because the CPU has `cpuid` support.
-        let vendor_id = unsafe { _vendor_id() };
-
-        // SAFETY: Calling `__cpuid`` is safe because the CPU has `cpuid` support.
-        let proc_info_ecx = unsafe { __cpuid(0x0000_0001_u32).ecx };
+    // SAFETY: Calling `__cpuid`` is safe because the CPU has `cpuid` support.
+    let proc_info_ecx = unsafe { __cpuid(0x0000_0001_u32).ecx };
 
-        // https://github.com/rust-lang/stdarch/blob/a0c30f3e3c75adcd6ee7efc94014ebcead61c507/crates/std_detect/src/detect/os/x86.rs#L111
-        if test(proc_info_ecx, 13) {
-            info.set(CpuInfo::HAS_CMPXCHG16B);
-        }
+    // https://github.com/rust-lang/stdarch/blob/a0c30f3e3c75adcd6ee7efc94014ebcead61c507/crates/std_detect/src/detect/os/x86.rs#L111
+    if test(proc_info_ecx, 13) {
+        info.set(CpuInfo::HAS_CMPXCHG16B);
+    }
 
-        // VMOVDQA is atomic on Intel and AMD CPUs with AVX.
-        // See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688 for details.
-        if vendor_id == VENDOR_ID_INTEL || vendor_id == VENDOR_ID_AMD {
-            // https://github.com/rust-lang/stdarch/blob/a0c30f3e3c75adcd6ee7efc94014ebcead61c507/crates/std_detect/src/detect/os/x86.rs#L131-L224
-            let cpu_xsave = test(proc_info_ecx, 26);
-            if cpu_xsave {
-                let cpu_osxsave = test(proc_info_ecx, 27);
-                if cpu_osxsave {
-                    // SAFETY: Calling `_xgetbv`` is safe because the CPU has `xsave` support
-                    // and OS has set `osxsave`.
-                    let xcr0 = unsafe { _xgetbv(0) };
-                    let os_avx_support = xcr0 & 6 == 6;
-                    if os_avx_support && test(proc_info_ecx, 28) {
-                        info.set(CpuInfo::HAS_VMOVDQA_ATOMIC);
-                    }
+    // VMOVDQA is atomic on Intel and AMD CPUs with AVX.
+    // See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688 for details.
+    if vendor_id == VENDOR_ID_INTEL || vendor_id == VENDOR_ID_AMD {
+        // https://github.com/rust-lang/stdarch/blob/a0c30f3e3c75adcd6ee7efc94014ebcead61c507/crates/std_detect/src/detect/os/x86.rs#L131-L224
+        let cpu_xsave = test(proc_info_ecx, 26);
+        if cpu_xsave {
+            let cpu_osxsave = test(proc_info_ecx, 27);
+            if cpu_osxsave {
+                // SAFETY: Calling `_xgetbv`` is safe because the CPU has `xsave` support
+                // and OS has set `osxsave`.
+                let xcr0 = unsafe { _xgetbv(0) };
+                let os_avx_support = xcr0 & 6 == 6;
+                if os_avx_support && test(proc_info_ecx, 28) {
+                    info.set(CpuInfo::HAS_VMOVDQA_ATOMIC);
                 }
             }
         }
@@ -109,9 +102,6 @@ mod tests {
 
     #[cfg(not(portable_atomic_test_outline_atomics_detect_false))]
     #[test]
-    // SGX doesn't support CPUID.
-    // Miri doesn't support inline assembly used in __cpuid.
-    #[cfg_attr(any(target_env = "sgx", miri), ignore)]
     fn test_cpuid() {
         assert_eq!(std::is_x86_feature_detected!("cmpxchg16b"), detect().has_cmpxchg16b());
         let vendor_id = unsafe { _vendor_id() };