[P2] Cleanup and update

[tancheng]

Deprecate en/rdy and use val/rdy for all modules.

[tancheng]

@RuihongY FYI.

[tancheng]

Hi @yo96, assigning this cleanup bug to you.

[tancheng]

The concrete TODOs:

• Replace en/rdy with val/rdy
• Resolve latches (provide initialization for all signals within a combinational block)
• Update CGRA and PyOCN to latest PyMTL4.0 (or 3.0 whatever)
• Make the xbar more modular rather than a behavioral-like design

[tancheng]

Hi @yo96, would following introduce combinational loop?

s.send_out[0].msg.predicate @= s.send_out[0].msg.predicate

in https://github.com/tancheng/VectorCGRA/blob/49a40187f90a8d67b0a410c0d3bc5944422e22e6/fu/single/AdderRTL.py#L104C9-L104C67

[yo96]

Yes, that looks like a combinational loop to me. It is like connecting the output of an AND gate to its input.

[tancheng]

The concrete TODOs:

• Replace en/rdy with val/rdy
• Resolve latches (provide initialization for all signals within a combinational block)
• Update CGRA and PyOCN to latest PyMTL4.0 (or 3.0 whatever)
• Make the xbar more modular rather than a behavioral-like design

Updated:

• Replace en/rdy with val/rdy: Separate xbar and replace en/rdy with val/rdy #54
• Resolve latches (provide initialization for all signals within a combinational block)
• Update CGRA and PyOCN to latest PyMTL4.0 (or 3.0 whatever)
• Make the xbar more modular rather than a behavioral-like design