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arch/arm64/src/imx9/imx9_lpi2c.c: Add error recovery on timeout
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Signed-off-by: Jukka Laitinen <[email protected]>
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jlaitine committed Sep 18, 2024
1 parent 18494f3 commit e6ef076
Showing 1 changed file with 19 additions and 1 deletion.
20 changes: 19 additions & 1 deletion arch/arm64/src/imx9/imx9_lpi2c.c
Original file line number Diff line number Diff line change
Expand Up @@ -2077,6 +2077,24 @@ static int imx9_lpi2c_transfer(struct i2c_master_s *dev,
ret = -ETIMEDOUT;
i2cerr("ERROR: Timed out: MSR: status: 0x0%" PRIx32 "\n",
priv->status);

/* Stop the ongoing transfer and clear the FIFOs */

imx9_lpi2c_stop_transfer(priv);

imx9_lpi2c_modifyreg(priv, IMX9_LPI2C_MCR_OFFSET, 0,
LPI2C_MCR_RTF | LPI2C_MCR_RRF);

/* Clear any errors */

imx9_lpi2c_putreg(priv, IMX9_LPI2C_MSR_OFFSET, LPI2C_MSR_ERROR_MASK);

/* Reset the semaphore. There is a race between interrupts and
* sem_waitdone, and the semaphore is anyhow posted one extra time in
* imx9_lpi2c_stop_transfer above
*/

nxsem_reset(&priv->sem_isr, 0);
}

/* Check for error status conditions */
Expand All @@ -2103,7 +2121,7 @@ static int imx9_lpi2c_transfer(struct i2c_master_s *dev,
{
/* FIFO Error */

i2cerr("Transfer without start condition\n");
i2cerr("FIFO error\n");
ret = -EINVAL;
}
}
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