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arch/arm64/lspi: improve spi initialization
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Hardware initialization is based refcount, not
spi enable bit. Interface to disable selected bus
added

Signed-off-by: Jouni Ukkonen <[email protected]>
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joukkone committed Nov 15, 2024
1 parent 3873bcc commit f7a50c9
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Showing 2 changed files with 88 additions and 49 deletions.
121 changes: 72 additions & 49 deletions arch/arm64/src/imx9/imx9_lpspi.c
Original file line number Diff line number Diff line change
Expand Up @@ -134,6 +134,7 @@ struct imx9_lpspidev_s
sem_t txsem; /* Wait for TX DMA to complete */
void *txbuf; /* Driver DMA safe buffer for TX */
void *rxbuf; /* Driver DMA safe buffer for RX */
int refcount; /* SPIn initialization counter */
#endif
};

Expand Down Expand Up @@ -1802,8 +1803,7 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)

/* Only configure if the bus is not already configured */

if ((imx9_lpspi_getreg32(priv, IMX9_LPSPI_CR_OFFSET)
& LPSPI_CR_MEN) == 0)
if (priv->refcount == 0)
{
/* Configure SPI1 pins: SCK, MISO, and MOSI */

Expand All @@ -1817,10 +1817,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#if defined(GPIO_LPSPI1_DC) && defined(CONFIG_SPI_CMDDATA)
imx9_iomux_configure(GPIO_LPSPI1_DC);
#endif

/* Set up default configuration: Master, 8-bit, etc. */

imx9_lpspi_bus_initialize(priv);
}
}
else
Expand All @@ -1834,8 +1830,7 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)

/* Only configure if the bus is not already configured */

if ((imx9_lpspi_getreg32(priv, IMX9_LPSPI_CR_OFFSET)
& LPSPI_CR_MEN) == 0)
if (priv->refcount == 0)
{
/* Configure SPI2 pins: SCK, MISO, and MOSI */

Expand All @@ -1849,10 +1844,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#if defined(GPIO_LPSPI2_DC) && defined(CONFIG_SPI_CMDDATA)
imx9_iomux_configure(GPIO_LPSPI2_DC);
#endif

/* Set up default configuration: Master, 8-bit, etc. */

imx9_lpspi_bus_initialize(priv);
}
}
else
Expand All @@ -1866,8 +1857,7 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)

/* Only configure if the bus is not already configured */

if ((imx9_lpspi_getreg32(priv, IMX9_LPSPI_CR_OFFSET)
& LPSPI_CR_MEN) == 0)
if (priv->refcount == 0)
{
/* Configure SPI3 pins: SCK, MISO, and MOSI */

Expand All @@ -1881,10 +1871,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#if defined(GPIO_LPSPI3_DC) && defined(CONFIG_SPI_CMDDATA)
imx9_iomux_configure(GPIO_LPSPI3_DC);
#endif

/* Set up default configuration: Master, 8-bit, etc. */

imx9_lpspi_bus_initialize(priv);
}
}
else
Expand All @@ -1898,8 +1884,7 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)

/* Only configure if the bus is not already configured */

if ((imx9_lpspi_getreg32(priv, IMX9_LPSPI_CR_OFFSET)
& LPSPI_CR_MEN) == 0)
if (priv->refcount == 0)
{
/* Configure SPI4 pins: SCK, MISO, and MOSI */

Expand All @@ -1913,10 +1898,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#if defined(GPIO_LPSPI4_DC) && defined(CONFIG_SPI_CMDDATA)
imx9_iomux_configure(GPIO_LPSPI4_DC);
#endif

/* Set up default configuration: Master, 8-bit, etc. */

imx9_lpspi_bus_initialize(priv);
}
}
else
Expand All @@ -1930,8 +1911,7 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)

/* Only configure if the bus is not already configured */

if ((imx9_lpspi_getreg32(priv, IMX9_LPSPI_CR_OFFSET)
& LPSPI_CR_MEN) == 0)
if (priv->refcount == 0)
{
/* Configure SPI5 pins: SCK, MISO, and MOSI */

Expand All @@ -1945,10 +1925,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#if defined(GPIO_LPSPI5_DC) && defined(CONFIG_SPI_CMDDATA)
imx9_iomux_configure(GPIO_LPSPI5_DC);
#endif

/* Set up default configuration: Master, 8-bit, etc. */

imx9_lpspi_bus_initialize(priv);
}
}
else
Expand All @@ -1962,8 +1938,7 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)

/* Only configure if the bus is not already configured */

if ((imx9_lpspi_getreg32(priv, IMX9_LPSPI_CR_OFFSET)
& LPSPI_CR_MEN) == 0)
if (priv->refcount == 0)
{
/* Configure SPI6 pins: SCK, MISO, and MOSI */

Expand All @@ -1977,10 +1952,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#if defined(GPIO_LPSPI6_DC) && defined(CONFIG_SPI_CMDDATA)
imx9_iomux_configure(GPIO_LPSPI6_DC);
#endif

/* Set up default configuration: Master, 8-bit, etc. */

imx9_lpspi_bus_initialize(priv);
}
}
else
Expand All @@ -1994,8 +1965,7 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)

/* Only configure if the bus is not already configured */

if ((imx9_lpspi_getreg32(priv, IMX9_LPSPI_CR_OFFSET)
& LPSPI_CR_MEN) == 0)
if (priv->refcount == 0)
{
/* Configure SPI7 pins: SCK, MISO, and MOSI */

Expand All @@ -2009,10 +1979,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#if defined(GPIO_LPSPI7_DC) && defined(CONFIG_SPI_CMDDATA)
imx9_iomux_configure(GPIO_LPSPI7_DC);
#endif

/* Set up default configuration: Master, 8-bit, etc. */

imx9_lpspi_bus_initialize(priv);
}
}
else
Expand All @@ -2026,8 +1992,7 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)

/* Only configure if the bus is not already configured */

if ((imx9_lpspi_getreg32(priv, IMX9_LPSPI_CR_OFFSET)
& LPSPI_CR_MEN) == 0)
if (priv->refcount == 0)
{
/* Configure SPI6 pins: SCK, MISO, and MOSI */

Expand All @@ -2041,18 +2006,28 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#if defined(GPIO_LPSPI8_DC) && defined(CONFIG_SPI_CMDDATA)
imx9_iomux_configure(GPIO_LPSPI8_DC);
#endif

/* Set up default configuration: Master, 8-bit, etc. */

imx9_lpspi_bus_initialize(priv);
}
}
else
#endif
{
leave_critical_section(flags);
spierr("ERROR: Unsupported SPI bus: %d\n", bus);
return NULL;
}

/* Set up default configuration: Master, 8-bit, etc. */

if (priv->refcount == 0)
{
/* Disable bus before initialization */

imx9_lpspibus_disable(bus);
imx9_lpspi_bus_initialize(priv);
}

priv->refcount++;

#ifdef CONFIG_IMX9_LPSPI_DMA
if (priv->rxch && priv->txch)
{
Expand Down Expand Up @@ -2084,8 +2059,56 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
#endif

leave_critical_section(flags);

return (struct spi_dev_s *)priv;
}

void imx9_lpspibus_disable(int bus)
{
switch (bus)
{
#ifdef CONFIG_IMX9_LPSPI1
case 1:
modifyreg32(IMX9_LPSPI1_BASE + IMX9_LPSPI_CR_OFFSET, LPSPI_CR_MEN, 0);
break;
#endif
#ifdef CONFIG_IMX9_LPSPI2
case 2:
modifyreg32(IMX9_LPSPI2_BASE + IMX9_LPSPI_CR_OFFSET, LPSPI_CR_MEN, 0);
break;
#endif
#ifdef CONFIG_IMX9_LPSPI3
case 3:
modifyreg32(IMX9_LPSPI3_BASE + IMX9_LPSPI_CR_OFFSET, LPSPI_CR_MEN, 0);
break;
#endif
#ifdef CONFIG_IMX9_LPSPI4
case 4:
modifyreg32(IMX9_LPSPI4_BASE + IMX9_LPSPI_CR_OFFSET, LPSPI_CR_MEN, 0);
break;
#endif
#ifdef CONFIG_IMX9_LPSPI5
case 5:
modifyreg32(IMX9_LPSPI5_BASE + IMX9_LPSPI_CR_OFFSET, LPSPI_CR_MEN, 0);
break;
#endif
#ifdef CONFIG_IMX9_LPSPI6
case 6:
modifyreg32(IMX9_LPSPI6_BASE + IMX9_LPSPI_CR_OFFSET, LPSPI_CR_MEN, 0);
break;
#endif
#ifdef CONFIG_IMX9_LPSPI7
case 7:
modifyreg32(IMX9_LPSPI7_BASE + IMX9_LPSPI_CR_OFFSET, LPSPI_CR_MEN, 0);
break;
#endif
#ifdef CONFIG_IMX9_LPSPI8
case 8:
modifyreg32(IMX9_LPSPI8_BASE + IMX9_LPSPI_CR_OFFSET, LPSPI_CR_MEN, 0);
break;
#endif
default:
spierr("ERROR: Unsupported SPI bus: %d\n", bus);
}
}

#endif /* CONFIG_IMX9_LPSPI */
16 changes: 16 additions & 0 deletions arch/arm64/src/imx9/imx9_lpspi.h
Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,22 @@ struct spi_dev_s; /* Forward reference */

struct spi_dev_s *imx9_lpspibus_initialize(int bus);

/****************************************************************************
* Name: imx9_lpspibus_disable
*
* Description:
* disable the selected SPI bus
*
* Input Parameters:
* bus number (for hardware that has multiple SPI interfaces)
*
* Returned Value:
* none
*
****************************************************************************/

void imx9_lpspibus_disable(int bus);

/****************************************************************************
* Name: imx9_lpspi1/2/...select and imx9_lpspi1/2/...status
*
Expand Down

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