risc-v/mpfs: ddr: lock segmentation registers #198
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Set the LOCKED bit when the final ddr segmentatition is in place. Otherwise the system is prone to potential security issues if the config is altered later. Once the LOCKED bit is set, the register may no longer be changed. Signed-off-by: Eero Nurkkala <[email protected]>
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I cherry-picked your commit in this PR and tried my Proof Of Concept exploit, and now it doesn't work because the segments are locked. I also printed the contents and the lock bit is correctly set ( I only checked SEG0_REG0 and SEG0_REG1) but it should be the same for the others. So the fix works as intended :) |
pussuw
approved these changes
Dec 18, 2023
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Set the LOCKED bit when the final ddr segmentatition is in place. Otherwise the system is prone to potential security issues if the config is altered later. Once the LOCKED bit is set, the register may no longer be changed.
Summary
As identified in DP-7916 @gpoulios , Is it possible to add Theodore Karatapanis (the reporter), I couldn't find him.
Impact
DDR config
Testing
Saluki-v2