Imx9 iomux ds

arch/arm64/include/imx9/chip.h

@@ -59,6 +59,8 @@
 
 #define MPID_TO_CLUSTER_ID(mpid)  ((mpid) & ~0xff)
 
+#define IMX9_GPIO_NPORTS          4
+
 #endif
 
 /****************************************************************************

arch/arm64/src/imx9/Kconfig

@@ -28,6 +28,10 @@ config IMX9_UART1
 	select UART1_SERIALDRIVER
 endmenu # iMX Peripheral Selection
 
+config IMX9_GPIO_IRQ
+	bool "GPIO Interrupt Support"
+	default n
+
 config IMX9_PLL
 	bool "PLL setup support (WIP)"
 	default n

arch/arm64/src/imx9/Make.defs

@@ -22,11 +22,15 @@ include common/Make.defs
 
 # i.MX9-specific C source files
 
-CHIP_CSRCS = imx9_boot.c imx9_ccm.c imx9_clockconfig.c
+CHIP_CSRCS = imx9_boot.c imx9_ccm.c imx9_clockconfig.c imx9_gpio.c imx9_iomuxc.c
 
 ifeq ($(CONFIG_ARCH_CHIP_IMX93),y)
   CHIP_CSRCS += imx9_lpuart.c
   ifeq ($(CONFIG_ARCH_EARLY_PRINT),y)
     CHIP_ASRCS = imx93_lowputc.S
   endif
 endif
+
+ifeq ($(CONFIG_IMX9_GPIO_IRQ),y)
+  CHIP_CSRCS += imx9_gpioirq.c
+endif

arch/arm64/src/imx9/chip.h

@@ -29,6 +29,8 @@
 
 #ifndef __ASSEMBLY__
 #  include <nuttx/arch.h>
+#  include <arch/irq.h>
+#  include <arch/imx9/chip.h>
 #endif
 
 /****************************************************************************

arch/arm64/src/imx9/hardware/imx93/imx93_ccm.h

@@ -579,13 +579,13 @@ enum ccm_clock_name_e
   ARM_PLL          = 1,  /* ARM PLL */
   ARM_PLLOUT       = 2,  /* ARM PLL OUT */
   SYS_PLL1_IN      = 3,  /* SYSTEM PLL1 IN */
-  SYS_PLL1PFD0_IN  = 5,  /* SYSTEM PLL1 PFD0 IN */
+  SYS_PLL1PFD0_IN  = 4,  /* SYSTEM PLL1 PFD0 IN */
   SYS_PLL1PFD0     = 5,  /* SYSTEM PLL1 PFD0 */
   SYS_PLL1PFD0DIV2 = 6,  /* SYSTEM PLL1 PFD0 DIV2  */
   SYS_PLL1PFD1_IN  = 7,  /* SYSTEM PLL1 PFD1 IN */
   SYS_PLL1PFD1     = 8,  /* SYSTEM PLL1 PFD1 */
   SYS_PLL1PFD1DIV2 = 9,  /* SYSTEM PLL1 PFD1 DIV2  */
-  SYS_PLL1PFD2_IN  = 11, /* SYSTEM PLL1 PFD2 IN */
+  SYS_PLL1PFD2_IN  = 10, /* SYSTEM PLL1 PFD2 IN */
   SYS_PLL1PFD2     = 11, /* SYSTEM PLL1 PFD2 */
   SYS_PLL1PFD2DIV2 = 12, /* SYSTEM PLL1 PFD2 DIV2  */
   AUDIO_PLL1       = 13, /* AUDIO PLL1 */

arch/arm64/src/imx9/hardware/imx93/imx93_gpio.h

@@ -0,0 +1,59 @@
+/****************************************************************************
+ * arch/arm64/src/imx9/hardware/imx93/imx93_gpio.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM64_SRC_IMX9_HARDWARE_IMX93_IMX93_GPIO_H
+#define __ARCH_ARM64_SRC_IMX9_HARDWARE_IMX93_IMX93_GPIO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include "imx93_memorymap.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define IMX9_GPIO_VERID_OFFSET          (0x0000) /* Version ID */
+#define IMX9_GPIO_PARAM_OFFSET          (0x0004) /* Parameter */
+#define IMX9_GPIO_LOCK_OFFSET           (0x000c) /* Lock */
+#define IMX9_GPIO_PCNS_OFFSET           (0x0010) /* Pin Control Nonsecure */
+#define IMX9_GPIO_ICNS_OFFSET           (0x0014) /* Interrupt Control Nonsecure */
+#define IMX9_GPIO_PCNP_OFFSET           (0x0018) /* Pin Control Nonprivilege */
+#define IMX9_GPIO_ICNP_OFFSET           (0x001c) /* Interrupt Control Nonprivilege */
+#define IMX9_GPIO_PDOR_OFFSET           (0x0040) /* Port Data Output */
+#define IMX9_GPIO_PSOR_OFFSET           (0x0044) /* Port Set Output */
+#define IMX9_GPIO_PCOR_OFFSET           (0x0048) /* Port Clear Output */
+#define IMX9_GPIO_PTOR_OFFSET           (0x004c) /* Port Toggle Output */
+#define IMX9_GPIO_PDIR_OFFSET           (0x0050) /* Port Data Input */
+#define IMX9_GPIO_PDDR_OFFSET           (0x0054) /* Port Data Direction */
+#define IMX9_GPIO_PIDR_OFFSET           (0x0058) /* Port Input Disable */
+#define IMX9_GPIO_P0DR_OFFSET           (0x0060) /* Pin Data (0-31 at offsets of n * 4h) */
+#define IMX9_GPIO_ICR0_OFFSET           (0x0080) /* Interrupt Control (0-31 at offsets of n * 4h) */
+#define IMX9_GPIO_GICLR_OFFSET          (0x0100) /* Global Interrupt Control Low */
+#define IMX9_GPIO_GICHR_OFFSET          (0x0104) /* Global Interrupt Control High */
+#define IMX9_GPIO_ISFR0_OFFSET          (0x0120) /* Interrupt Status Flag */
+#define IMX9_GPIO_ISFR1_OFFSET          (0x0124) /* Interrupt Status Flag */
+
+#endif /* __ARCH_ARM64_SRC_IMX9_HARDWARE_IMX93_IMX93_GPIO_H */