[BACKPORT] Pull iMX9 changes from upstream #249
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ARMv8.2-A has PSCI -> it also has support for system reset
This driver supports both eDMA3 and eDMA4 (also referred to as DMA0 / DMA1 in some contexts..) The IP blocks are almost identical, with sufficiently minor differences to use them via a unified driver. The price is a great amount of code obfuscation in the hardware description layer.
The frequency LUT idea is not necessary as the PLL output can be calculated by the CPU. It is better to do this as the clocks are set by the SPL (2nd stage program loader) which means the NuttX payload would not have access to such a LUT anyhow. The mask PLL_DIV_RDIV_MASK is also fixed, as that was simply wrong. Also add call to imx9_clockconfig (although it does not do anything yet).
This patch adds a way to configure PLL frequencies. The configuration is given by board logic. These values should only be modified by the bootloader, but we don't have that yet so the flag is never activated.
Add a simple allocator for DMA safe memory. It will provide contiguous blocks of memory with D-Cache line size alignment. NOTE: The optimal granule size is the D-Cache line size (64), but due to restrictions in the granule allocator this would result in a maximum block size of 2K only, thus use 256B granules instead givin 8K max block size. Once the granule allocator is fixed this limitation can be removed.
Using user allocated buffers for DMA transfers is not safe for two reasons: - User space memory is virtual memory, DMA needs physical memory - User memory buffer alignment cannot be guaranteed -> cache line ops are not safe
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DMA support, PLL support, and so forth. Everything is pulled directly from upstream.