update readme

tools/pwm/pr.md

@@ -2,7 +2,7 @@
 
 Blocking delays are observed when setting `duty_cycle` in the `samd` port of CircuitPython (see https://github.com/adafruit/circuitpython/issues/7653), behavior which interferes with some applications of PWM, and which differs from from that of other ports.  Here is a comparison of execution times of several basic operations on three different ports, showing the off-the-charts slowness of `samd` in setting PWM duty cycle:
 
-<img src="https://github.com/timchinowsky/circuitpython/tools/pwm/samd51_benchmarks.png", width="500" />
+![](samd51_benchmarks.png)
 
 Investigation of this issue revealed another problem concerning the method by which the API alters the requested PWM duty cycle to accommodate processor clock limitations.  In some cases, the API will round a non-zero duty cycle down to zero, causing the PWM signal to stop cycling at all, which can be problematic.
 This cartoon shows how for instance rounding can transform three PWM cycles, with the first almost 100% duty and the second two close to 0% duty, into one PWM cycle with three times the period and ~33% duty: