Merge pull request #1 from timsearle/feature/missing_instructions

Implement several missing instructions
timsearle · May 8, 2021 · 9bd8c8c · 9bd8c8c
2 parents e14410f + dc54639
commit 9bd8c8c
Show file tree

Hide file tree

Showing 7 changed files with 246 additions and 91 deletions.
diff --git a/README.md b/README.md
@@ -32,9 +32,7 @@ There is a chance there are currently issues with certain instructions that yet
 
 | Instruction Value | Instruction Name |
 | ------------------- | -------------------  |
-| 0x02                    | STAX B       |
 | 0x08                    | ?       |
-| 0x0b                    | DCX B       |
 | 0x10                    | ?       |
 | 0x17                    | RAL       |
 | 0x18                    | ?       |
@@ -59,12 +57,6 @@ There is a chance there are currently issues with certain instructions that yet
 | 0x9d                    | SBB L       |
 | 0x9e                    | SBB M       |
 | 0x9f                     | SBB A       |
-| 0xa9                    | XRA C       |
-| 0xaa                    | XRA D       |
-| 0xab                    | XRA E      |
-| 0xac                    | XRA H      |
-| 0xad                    | XRA L      |
-| 0xae                    | XRA M       |
 | 0xc7                    | RST 0       |
 | 0xcb                    | ?       |
 | 0xce                    | ACI D8       |

diff --git a/Sources/Emul8080r/CPU+InstructionHelpers.swift b/Sources/Emul8080r/CPU+InstructionHelpers.swift
@@ -1,7 +1,7 @@
 extension CPU {
     // MARK: Control Flow
     func jump()  {
-        state.pc = Int(addressRegisterPair(memory[state.pc + 2], memory[state.pc + 1]))
+        state.pc = Int(addressRegisterPair(state.memory[state.pc + 2], state.memory[state.pc + 1]))
     }
 
     func ret() throws {
@@ -40,7 +40,7 @@ extension CPU {
             state.registers.l = result
         case .m:
             let address = m_address()
-            let value = memory[address]
+            let value = state.memory[address]
             (result, _) = value.addingReportingOverflow(1)
             try write(result, at: address)
         case .a:
@@ -75,7 +75,7 @@ extension CPU {
             state.registers.l = result
         case .m:
             let address = m_address()
-            let value = memory[address]
+            let value = state.memory[address]
             (result, _) = value.subtractingReportingOverflow(1)
             try write(result, at: address)
         case .a:
@@ -100,8 +100,8 @@ extension CPU {
     }
 
     func pop() throws -> (UInt8, UInt8) {
-        let high = memory[state.sp + 1]
-        let low = memory[state.sp]
+        let high = state.memory[state.sp + 1]
+        let low = state.memory[state.sp]
         state.sp += 2
 
         return (high, low)
@@ -126,15 +126,16 @@ extension CPU {
     }
 
     func writeImmediate(to pair: RegisterPair) {
-        write(addressRegisterPair(memory[state.pc + 2], memory[state.pc + 1]), pair: pair)
+        write(addressRegisterPair(state.memory[state.pc + 2], state.memory[state.pc + 1]), pair: pair)
     }
 
     func write(_ value: UInt8, at address: Int) throws {
-        guard address >= 0x2000 else {
-            throw Error.cannotWriteToROM(address)
+        if let bounds = safeMemoryBounds {
+            guard address >= bounds.lowerBound && address <= bounds.upperBound else {
+                throw Error.cannotWriteToROM(address)
+            }
         }
-
-        memory[address] = value
+        state.memory[address] = value
     }
 
     // MARK: Addressing