Fix RP2350 memory layout

src/machine/board_pico2.go

@@ -0,0 +1,88 @@
+//go:build pico2
+
+package machine
+
+// GPIO pins
+const (
+	GP0  Pin = GPIO0
+	GP1  Pin = GPIO1
+	GP2  Pin = GPIO2
+	GP3  Pin = GPIO3
+	GP4  Pin = GPIO4
+	GP5  Pin = GPIO5
+	GP6  Pin = GPIO6
+	GP7  Pin = GPIO7
+	GP8  Pin = GPIO8
+	GP9  Pin = GPIO9
+	GP10 Pin = GPIO10
+	GP11 Pin = GPIO11
+	GP12 Pin = GPIO12
+	GP13 Pin = GPIO13
+	GP14 Pin = GPIO14
+	GP15 Pin = GPIO15
+	GP16 Pin = GPIO16
+	GP17 Pin = GPIO17
+	GP18 Pin = GPIO18
+	GP19 Pin = GPIO19
+	GP20 Pin = GPIO20
+	GP21 Pin = GPIO21
+	GP22 Pin = GPIO22
+	GP26 Pin = GPIO26
+	GP27 Pin = GPIO27
+	GP28 Pin = GPIO28
+
+	// Onboard LED
+	LED Pin = GPIO25
+
+	// Onboard crystal oscillator frequency, in MHz.
+	xoscFreq = 12 // MHz
+)
+
+// I2C Default pins on Raspberry Pico.
+const (
+	I2C0_SDA_PIN = GP4
+	I2C0_SCL_PIN = GP5
+
+	I2C1_SDA_PIN = GP2
+	I2C1_SCL_PIN = GP3
+)
+
+// SPI default pins
+const (
+	// Default Serial Clock Bus 0 for SPI communications
+	SPI0_SCK_PIN = GPIO18
+	// Default Serial Out Bus 0 for SPI communications
+	SPI0_SDO_PIN = GPIO19 // Tx
+	// Default Serial In Bus 0 for SPI communications
+	SPI0_SDI_PIN = GPIO16 // Rx
+
+	// Default Serial Clock Bus 1 for SPI communications
+	SPI1_SCK_PIN = GPIO10
+	// Default Serial Out Bus 1 for SPI communications
+	SPI1_SDO_PIN = GPIO11 // Tx
+	// Default Serial In Bus 1 for SPI communications
+	SPI1_SDI_PIN = GPIO12 // Rx
+)
+
+// UART pins
+const (
+	UART0_TX_PIN = GPIO0
+	UART0_RX_PIN = GPIO1
+	UART1_TX_PIN = GPIO8
+	UART1_RX_PIN = GPIO9
+	UART_TX_PIN  = UART0_TX_PIN
+	UART_RX_PIN  = UART0_RX_PIN
+)
+
+var DefaultUART = UART0
+
+// USB identifiers
+const (
+	usb_STRING_PRODUCT      = "Pico2"
+	usb_STRING_MANUFACTURER = "Raspberry Pi"
+)
+
+var (
+	usb_VID uint16 = 0x2E8A
+	usb_PID uint16 = 0x000A
+)

src/machine/machine_rp2_2350.go

@@ -8,10 +8,8 @@ import (
 )
 
 const (
-	LED             = GPIO25
 	_NUMBANK0_GPIOS = 48
 	_NUMBANK0_IRQS  = 6
-	xoscFreq        = 12 // Pico 2 Crystal oscillator Abracon ABM8-272-T3 frequency in MHz
 	rp2350ExtraReg  = 1
 	notimpl         = "rp2350: not implemented"
 	initUnreset     = rp.RESETS_RESET_ADC |
@@ -22,16 +20,6 @@ const (
 		rp.RESETS_RESET_USBCTRL
 )
 
-// UART pins
-const (
-	UART0_TX_PIN = GPIO0
-	UART0_RX_PIN = GPIO1
-	UART1_TX_PIN = GPIO8
-	UART1_RX_PIN = GPIO9
-	UART_TX_PIN  = UART0_TX_PIN
-	UART_RX_PIN  = UART0_RX_PIN
-)
-
 const (
 	PinOutput PinMode = iota
 	PinInput

targets/arm.ld

@@ -9,6 +9,7 @@ SECTIONS
     .text :
     {
         KEEP(*(.isr_vector))
+        KEEP(*(.after_isr_vector)) /* for the RP2350 */
         *(.text)
         *(.text.*)
         *(.rodata)

targets/pico2.json

@@ -3,8 +3,5 @@
         "rp2350"
     ],
     "build-tags": ["pico2"],
-    "linkerscript": "targets/pico2.ld",
-    "extra-files": [
-        "targets/pico_boot_stage2.S"
-    ]
+    "serial-port": ["2e8a:000A"]
 }

targets/rp2350.json

@@ -8,9 +8,9 @@
     "msd-firmware-name": "firmware.uf2",
     "binary-format": "uf2",
     "uf2-family-id": "0xe48bff59","comment":"See page 393 of RP2350 datasheet: RP2350 Arm Secure image (i.e. one intended to be booted directly by the bootrom)",
-    "rp2040-boot-patch": true,
     "extra-files": [
-        "targets/rp2350_boot2_generic03h.S"
+        "src/device/rp/rp2350.s",
+        "targets/rp2350_embedded_block.s"
     ],
     "linkerscript": "targets/rp2350.ld",
     "openocd-interface": "picoprobe",

targets/rp2350.ld

@@ -10,36 +10,14 @@ MEMORY
        i.e: Separate stacks for core0 and core1. */
     SRAM4 : ORIGIN = 0x20080000, LENGTH = 4k
     SRAM5 : ORIGIN = 0x20081000, LENGTH = 4k
-    /* Reserve exactly 256 bytes at start of flash for second stage bootloader */
-    BOOT2_TEXT (rx) : ORIGIN = 0x10000000, LENGTH = 256
-    FLASH_TEXT (rx) : ORIGIN = 0x10000000 + 256, LENGTH = 2048k - 256
+    FLASH_TEXT (rx) : ORIGIN = 0x10000000, LENGTH = 2048k
     RAM (rwx)       : ORIGIN = 0x20000000, LENGTH = 512k
 }
 
 _stack_size = 2K;
 
 SECTIONS
 {
-    /* Second stage bootloader is prepended to the image. It must be 256 bytes
-       and checksummed.  The gap to the checksum is zero-padded.
-    */
-    .boot2 : {
-        __boot2_start__ = .;
-        KEEP (*(.boot2));
-
-        /* Explicitly allocate space for CRC32 checksum at end of second stage
-           bootloader
-        */
-        . = __boot2_start__ + 256 - 4;
-        LONG(0)
-    } > BOOT2_TEXT = 0x0
-
-    /* The second stage will always enter the image at the start of .text.
-       The debugger will use the ELF entry point, which is the _entry_point
-       symbol if present, otherwise defaults to start of .text.
-       This can be used to transfer control back to the bootrom on debugger
-       launches only, to perform proper flash setup.
-    */
 }
 
 INCLUDE "targets/arm.ld"