[Intrinsic] lower_bound and upper_bound for binary search in Sparse TIR.

[yzh119]

Implement the intrinsic on CUDA for Sparse TIR (#466 ).

cc @junrushao1994 @MasterJH5574 .

[MasterJH5574]

Another question is, how shall we implement binary search for llvm?

[MasterJH5574]

LGTM!

[masahi]

Hi @yzh119 @MasterJH5574, I merged a PR apache/tvm#9184 that implements binary search in TIR using while loop. Specifically, this function https://github.com/masahi/tvm/blob/431db6b3f450e6ff61056e632d2413903d7411e0/python/tvm/topi/searchsorted.py#L25 generates binary search IR that is used by both CPU and GPU backends. Probably we don't have to implement the intrinsic specifically for CUDA.

I hope TIR while loop is generally useful for sparse-related projects.

[yzh119]

@masahi thank you! Yes I noticed that file before, but it's inside topi folder.
How about I refactor the code and make it an intrinsic in TIR in apache/tvm? I'll invite you to review the PR.

[masahi]

How about I refactor the code and make it an intrinsic in TIR in apache/tvm?

Yes! That sounds great. I added binary_search IR solely for implementing searchsorted, but if it can be reused for other purpose, I'd be very happy.