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An independent implementation of the post-quantum digital signing algorithm SPHINCS+ on a Arm Cortex-M0+ STM32 microcontroller.

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undacmic/STM32-SPHINCS-PLUS

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SPHINCS+ Arm Cortex-M0+ implementation

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An independent implementation of the post-quantum digital signing algorithm SPHINCS+ on a Arm Cortex-M0+ STM32 microcontroller.

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