fix rasp build

and fix warnings

src/pinmame.mak

@@ -141,6 +141,7 @@ PINGAMES += $(PINOBJ)/sims/wpc/full/gw.o
 PINGAMES += $(PINOBJ)/sims/wpc/full/hurr.o
 PINGAMES += $(PINOBJ)/sims/wpc/full/ij.o
 PINGAMES += $(PINOBJ)/sims/wpc/full/jd.o
+PINGAMES += $(PINOBJ)/sims/wpc/full/nbaf.o
 PINGAMES += $(PINOBJ)/sims/wpc/full/pz.o
 PINGAMES += $(PINOBJ)/sims/wpc/full/rs.o
 PINGAMES += $(PINOBJ)/sims/wpc/full/sttng.o
@@ -167,7 +168,6 @@ PINGAMES += $(PINOBJ)/sims/wpc/prelim/jb.o
 PINGAMES += $(PINOBJ)/sims/wpc/prelim/jm.o
 PINGAMES += $(PINOBJ)/sims/wpc/prelim/jy.o
 PINGAMES += $(PINOBJ)/sims/wpc/prelim/mb.o
-PINGAMES += $(PINOBJ)/sims/wpc/prelim/nbaf.o
 PINGAMES += $(PINOBJ)/sims/wpc/prelim/nf.o
 PINGAMES += $(PINOBJ)/sims/wpc/prelim/pop.o
 PINGAMES += $(PINOBJ)/sims/wpc/prelim/sc.o

src/unix/devices.c

@@ -970,8 +970,7 @@ void joy_evaluate_moves(void)
  * sdevaux 02/2003 : Updated from windows code.
  * sdevaux 04/2003 : fix y-axis not seen as analog (reported by Paul Rahme)
  */
-void osd_analogjoy_read(int player, int analog_axis[],
-		InputCode analogjoy_input[])
+void osd_analogjoy_read(int player, int analog_axis[MAX_ANALOG_AXES], InputCode analogjoy_input[MAX_ANALOG_AXES])
 {
 	int i, j;
 	/* is player var enough to select joystick : what if joystick 2 is mapped to

src/windows/input.c

@@ -1433,7 +1433,7 @@ int osd_is_joy_pressed(int joycode)
 //	osd_analogjoy_read
 //============================================================
 
-void osd_analogjoy_read(int player, int analog_axis[], InputCode analogjoy_input[])
+void osd_analogjoy_read(int player, int analog_axis[MAX_ANALOG_AXES], InputCode analogjoy_input[MAX_ANALOG_AXES])
 {
 	LONG top, bottom, middle;
 	int i;

src/wpc/gts3dmd.c

@@ -6,16 +6,16 @@
 extern GTS3_DMDlocals GTS3_dmdlocals[2];
 
 // GTS3 hardware creates shades by quickly switching frames (PWM).
-// It uses pattern of 3, 6, 8 or 10 frames at 376Hz to create the 
-// PWM pattern. We store the last 24 frames and apply a FIR low pass 
+// It uses a pattern of 3, 6, 8 or 10 frames at 376Hz to create the
+// PWM pattern. We store the last 24 frames and apply a FIR low pass
 // filter computed with GNU Octave (script is given in core.c).
 //
 // Previous version had an optimized implementation, storing as little frames as
 // possible for each GTS3 game (see commit 9b9ac9a5c2bfedac13ca382ff6669837882c129d).
 // This was needed because each game had a different (somewhat wrong) VSync frequency.
 // This lead to better performance since less frames were accumulated but had 2 side effects:
 // - there were some occasional residual flickers,
-// - DMD luminance were not fully coherent between GTS3 games (some 4 shades, some other 5 shades).
+// - DMD luminance was not fully coherent between GTS3 games (some 4 shades, some other 5 shades).
 int gts3_dmd128x32(int which, struct mame_bitmap* bitmap, const struct rectangle* cliprect, const struct core_dispLayout* layout)
 {
   core_dmd_update_pwm(&GTS3_dmdlocals[which].pwm_state);
@@ -24,4 +24,4 @@ int gts3_dmd128x32(int which, struct mame_bitmap* bitmap, const struct rectangle
 }
 
 PINMAME_VIDEO_UPDATE(gts3_dmd128x32a) { return gts3_dmd128x32(0, bitmap, cliprect, layout); }
-PINMAME_VIDEO_UPDATE(gts3_dmd128x32b) { return gts3_dmd128x32(1, bitmap, cliprect, layout); }
+PINMAME_VIDEO_UPDATE(gts3_dmd128x32b) { return gts3_dmd128x32(1, bitmap, cliprect, layout); }

src/wpc/wpc.c

@@ -1575,12 +1575,12 @@ static VIDEO_START(wpc_dmd) {
   return 0;
 }
 
-// The DMD controller constantly rasterize the content of a page of RAM.
-// It is driven by the main CPU clock at 2MHz and use freq dividers to generate
-// all timings. In the end, page are rasterized at 2Mz / (128*32*2*2) = 122.07Hz
-// where the first 2 divider is the dot clock divider and the second is the 
+// The DMD controller constantly rasterizes the content of a page of RAM.
+// It is driven by the main CPU clock at 2MHz and uses freq dividers to generate
+// all timings. In the end, pages are rasterized at 2MHz / (128*32*2*2) = 122.07Hz
+// where the first 2 dividers are the dot clock divider and the second is the 
 // VBlank divider. All of this was deduced from the pre WPC-95 schematics.
-// lucky1 measured on the real machines to 122.1Hz which validates it.
+// lucky1 measured on a real machine 122.1Hz which validates it.
 // CPU may ask the DMD board to raise FIRQ when a given row is reached.
 // The FIRQ is then acked (pulled down) by writing again the requested FIRQ row 
 // to the corresponding register (if >31, it disables DMD FIRQ).