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34 Open 23 Closed
34 Open 23 Closed
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Issues list

Fix merging of PyUmiPacket
#262 opened Oct 11, 2024 by azaidy
Auto-format integer constants used in tie-offs
#232 opened May 29, 2024 by sgherbst
Clean up for single-netlist Verilog generation
#231 opened May 29, 2024 by sgherbst
CPU affinity
#224 opened May 17, 2024 by sgherbst
Approximate synchronization of simulation time for waveform comparisons
#220 opened May 10, 2024 by sgherbst
1
autowrap: be able to specify tieoffs as runtime parameters
#218 opened May 10, 2024 by sgherbst
Support UMI packets with DW>256
#217 opened May 10, 2024 by sgherbst
Mechanism for general interface connections in subnetworks
#216 opened May 9, 2024 by sgherbst
Mechanism for declaring arrayed/bundled interfaces with autowrap
#215 opened May 9, 2024 by sgherbst
1
Improve simulator shutdown behavior for regression tests
#202 opened Mar 8, 2024 by sgherbst
Document "args" example and make self-checking
#201 opened Mar 8, 2024 by sgherbst
Pass DW information automatically from Verilog modules to software interface
#194 opened Feb 1, 2024 by sgherbst
Provide a mechanism for retrieving TX/RX queue names from a UmiTxRx object
#154 opened Nov 7, 2023 by sgherbst
Implement wstrb in switchboard/verilog/fpga/config_registers.sv
#149 opened Nov 7, 2023 by sgherbst
Central definition of UMI parameters supported by switchboard
#148 opened Nov 7, 2023 by sgherbst
Avoid copying data in python/switchboard_pybind.cc
#147 opened Nov 7, 2023 by sgherbst
Perform checking in examples/fpga_loopback
#146 opened Nov 7, 2023 by sgherbst
Support Windows
#139 opened Nov 6, 2023 by sgherbst
"Verbose" mode
#133 opened Nov 3, 2023 by sgherbst
1
Explore abstractions for testing UMI hosts
#132 opened Nov 3, 2023 by sgherbst
Fix issue in perf_meas_sim when there is a drop in simulation speed
#130 opened Nov 3, 2023 by sgherbst
Make it easier to validate queue name connections
#128 opened Nov 3, 2023 by sgherbst
Review blocking behavior in Python API
#127 opened Nov 3, 2023 by sgherbst
Comprehensive test of ready/valid signaling styles
#126 opened Nov 3, 2023 by sgherbst
Explore more performant ways to expose many queues on FPGA
#125 opened Nov 3, 2023 by sgherbst
ProTip! Exclude everything labeled bug with -label:bug.