fix: update msr baseline

Update msr baseline to include new MSRs 0xc0011023 that was added in https://lore.kernel.org/all/[email protected] The other updates in msr values are because we collect baselines are created by test and can be ignored. Signed-off-by: Sudan Landge <[email protected]>
zulinx86 · Jan 17, 2024 · 16190bc · 16190bc
1 parent d111c23
commit 16190bc
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Showing 24 changed files with 192 additions and 168 deletions.
diff --git a/tests/data/msr/msr_list_T2A_AMD_MILAN_4.14host_4.14guest.csv b/tests/data/msr/msr_list_T2A_AMD_MILAN_4.14host_4.14guest.csv
@@ -1,8 +1,8 @@
 MSR_ADDR,VALUE
 0,0x0
 0x1,0x0
-0x10,0x68fc4e3a
-0x11,0x1e14fc8
+0x10,0xec75cdf5
+0x11,0x1ddaf68
 0x12,0x3ffdc001
 0x17,0x0
 0x1b,0xfee00d00
@@ -20,7 +20,7 @@ MSR_ADDR,VALUE
 0x140,0x0
 0x174,0x10
 0x175,0xfffffe0000003000
-0x176,0xffffffff81601830
+0x176,0xffffffff81601930
 0x179,0x20
 0x17a,0x0
 0x186,0x0
@@ -190,7 +190,7 @@ MSR_ADDR,VALUE
 0x47d,0x0
 0x47e,0x0
 0x47f,0x0
-0x6e0,0x131f7c7b4
+0x6e0,0x1a87546c1
 0x802,0x0
 0x803,0x50014
 0x808,0x0
@@ -236,9 +236,9 @@ MSR_ADDR,VALUE
 0xc0000080,0xd01
 0xc0000081,0x23001000000000
 0xc0000082,0xffffffff81600020
-0xc0000083,0xffffffff816018c0
+0xc0000083,0xffffffff816019e0
 0xc0000084,0x47700
-0xc0000100,0x7f17f782b500
+0xc0000100,0x7f101793d740
 0xc0000101,0xffff88803fc00000
 0xc0000102,0x0
 0xc0000103,0x0
@@ -265,6 +265,7 @@ MSR_ADDR,VALUE
 0xc0010141,0x0
 0xc0011021,0x0
 0xc0011022,0x0
+0xc0011023,0x0
 0xc0011029,0x2
 0xc001102a,0x0
 0xc001102c,0x0

diff --git a/tests/data/msr/msr_list_T2A_AMD_MILAN_4.14host_5.10guest.csv b/tests/data/msr/msr_list_T2A_AMD_MILAN_4.14host_5.10guest.csv
@@ -1,9 +1,9 @@
 MSR_ADDR,VALUE
 0,0x0
 0x1,0x0
-0x10,0xd18cae60
-0x11,0x2a00000
-0x12,0x2a01001
+0x10,0x13c0ec976
+0x11,0x2501008
+0x12,0x2502001
 0x17,0x0
 0x1b,0xfee00d00
 0x2a,0x0
@@ -20,7 +20,7 @@ MSR_ADDR,VALUE
 0x140,0x0
 0x174,0x10
 0x175,0xfffffe0000003000
-0x176,0xffffffff81801370
+0x176,0xffffffff81601450
 0x179,0x20
 0x17a,0x0
 0x186,0x0
@@ -190,7 +190,7 @@ MSR_ADDR,VALUE
 0x47d,0x0
 0x47e,0x0
 0x47f,0x0
-0x6e0,0x1999e7600
+0x6e0,0x206a49129
 0x802,0x0
 0x803,0x50014
 0x808,0x10
@@ -235,10 +235,10 @@ MSR_ADDR,VALUE
 0x83e,0x0
 0xc0000080,0xd01
 0xc0000081,0x23001000000000
-0xc0000082,0xffffffff81800000
-0xc0000083,0xffffffff81801400
+0xc0000082,0xffffffff81600040
+0xc0000083,0xffffffff81601500
 0xc0000084,0x47700
-0xc0000100,0x7f092bc10500
+0xc0000100,0x7f9048463740
 0xc0000101,0xffff88803ec00000
 0xc0000102,0x0
 0xc0000103,0x0
@@ -265,6 +265,7 @@ MSR_ADDR,VALUE
 0xc0010141,0x0
 0xc0011021,0x0
 0xc0011022,0x0
+0xc0011023,0x0
 0xc0011029,0x2
 0xc001102a,0x0
 0xc001102c,0x0

diff --git a/tests/data/msr/msr_list_T2A_AMD_MILAN_5.10host_4.14guest.csv b/tests/data/msr/msr_list_T2A_AMD_MILAN_5.10host_4.14guest.csv
@@ -1,8 +1,8 @@
 MSR_ADDR,VALUE
 0,0x0
 0x1,0x0
-0x10,0x5aab542d
-0x11,0x1e14fc8
+0x10,0x9eef91f4
+0x11,0x1ddaf68
 0x12,0x3ffdc001
 0x17,0x0
 0x1b,0xfee00d00
@@ -21,7 +21,7 @@ MSR_ADDR,VALUE
 0x140,0x0
 0x174,0x10
 0x175,0xfffffe0000003000
-0x176,0xffffffff81601830
+0x176,0xffffffff81601930
 0x179,0x20
 0x17a,0x0
 0x186,0x0
@@ -197,7 +197,7 @@ MSR_ADDR,VALUE
 0x619,0x0
 0x639,0x0
 0x641,0x0
-0x6e0,0x123604d68
+0x6e0,0x14ad74821
 0x802,0x0
 0x803,0x50014
 0x808,0x0
@@ -242,9 +242,9 @@ MSR_ADDR,VALUE
 0xc0000080,0xd01
 0xc0000081,0x23001000000000
 0xc0000082,0xffffffff81600020
-0xc0000083,0xffffffff816018c0
+0xc0000083,0xffffffff816019e0
 0xc0000084,0x47700
-0xc0000100,0x7fec7e827500
+0xc0000100,0x7f4709ea3740
 0xc0000101,0xffff88803fc00000
 0xc0000102,0x0
 0xc0000103,0x0
@@ -284,6 +284,7 @@ MSR_ADDR,VALUE
 0xc001020b,0x0
 0xc0011021,0x0
 0xc0011022,0x0
+0xc0011023,0x0
 0xc0011029,0x2
 0xc001102a,0x0
 0xc001102c,0x0

diff --git a/tests/data/msr/msr_list_T2A_AMD_MILAN_5.10host_5.10guest.csv b/tests/data/msr/msr_list_T2A_AMD_MILAN_5.10host_5.10guest.csv
@@ -1,9 +1,9 @@
 MSR_ADDR,VALUE
 0,0x0
 0x1,0x0
-0x10,0xd6305253
-0x11,0x2a00000
-0x12,0x2a01001
+0x10,0xfd7a7f6d
+0x11,0x2501008
+0x12,0x2502001
 0x17,0x0
 0x1b,0xfee00d00
 0x2a,0x0
@@ -21,7 +21,7 @@ MSR_ADDR,VALUE
 0x140,0x0
 0x174,0x10
 0x175,0xfffffe0000003000
-0x176,0xffffffff81801370
+0x176,0xffffffff81601450
 0x179,0x20
 0x17a,0x0
 0x186,0x0
@@ -197,7 +197,7 @@ MSR_ADDR,VALUE
 0x619,0x0
 0x639,0x0
 0x641,0x0
-0x6e0,0x1aa22772e
+0x6e0,0x1bc5fe0e2
 0x802,0x0
 0x803,0x50014
 0x808,0x10
@@ -241,10 +241,10 @@ MSR_ADDR,VALUE
 0x83e,0x0
 0xc0000080,0xd01
 0xc0000081,0x23001000000000
-0xc0000082,0xffffffff81800000
-0xc0000083,0xffffffff81801400
+0xc0000082,0xffffffff81600040
+0xc0000083,0xffffffff81601500
 0xc0000084,0x47700
-0xc0000100,0x7f6faddd9500
+0xc0000100,0x7ff85489f740
 0xc0000101,0xffff88803ec00000
 0xc0000102,0x0
 0xc0000103,0x0
@@ -284,6 +284,7 @@ MSR_ADDR,VALUE
 0xc001020b,0xffff
 0xc0011021,0x0
 0xc0011022,0x0
+0xc0011023,0x0
 0xc0011029,0x2
 0xc001102a,0x0
 0xc001102c,0x0

diff --git a/tests/data/msr/msr_list_T2CL_INTEL_CASCADELAKE_4.14host_4.14guest.csv b/tests/data/msr/msr_list_T2CL_INTEL_CASCADELAKE_4.14host_4.14guest.csv
@@ -1,8 +1,8 @@
 MSR_ADDR,VALUE
 0,0x0
 0x1,0x0
-0x10,0x7265a9a0
-0x11,0x1e14fc8
+0x10,0xf62284f0
+0x11,0x1ddaf68
 0x12,0x3ffdc001
 0x17,0x0
 0x1b,0xfee00d00
@@ -22,7 +22,7 @@ MSR_ADDR,VALUE
 0x140,0x0
 0x174,0x10
 0x175,0xfffffe0000003000
-0x176,0xffffffff81601830
+0x176,0xffffffff81601930
 0x179,0x20
 0x17a,0x0
 0x186,0x0
@@ -192,7 +192,7 @@ MSR_ADDR,VALUE
 0x47d,0x0
 0x47e,0x0
 0x47f,0x0
-0x6e0,0x16b2bdbfc
+0x6e0,0x200711312
 0x800,0x0
 0x801,0x0
 0x802,0x0
@@ -453,9 +453,9 @@ MSR_ADDR,VALUE
 0xc0000080,0xd01
 0xc0000081,0x23001000000000
 0xc0000082,0xffffffff81600020
-0xc0000083,0xffffffff816018c0
+0xc0000083,0xffffffff816019e0
 0xc0000084,0x47700
-0xc0000100,0x7f283814d500
+0xc0000100,0x7f9a0c91f740
 0xc0000101,0xffff88803fc00000
 0xc0000102,0x0
 0xc0000103,0x0
@@ -477,6 +477,7 @@ MSR_ADDR,VALUE
 0xc0010113,0x0
 0xc0010117,0x0
 0xc0011022,0x0
+0xc0011023,0x0
 0xc001102a,0x0
 0xc001102c,0x0
 0x400000000,0x0

diff --git a/tests/data/msr/msr_list_T2CL_INTEL_CASCADELAKE_4.14host_5.10guest.csv b/tests/data/msr/msr_list_T2CL_INTEL_CASCADELAKE_4.14host_5.10guest.csv
@@ -1,9 +1,9 @@
 MSR_ADDR,VALUE
 0,0x0
 0x1,0x0
-0x10,0xcbb296b6
-0x11,0x2a00000
-0x12,0x2a01001
+0x10,0x134609d0c
+0x11,0x2501008
+0x12,0x2502001
 0x17,0x0
 0x1b,0xfee00d00
 0x2a,0x0
@@ -22,7 +22,7 @@ MSR_ADDR,VALUE
 0x140,0x0
 0x174,0x10
 0x175,0xfffffe0000003000
-0x176,0xffffffff81801370
+0x176,0xffffffff81601450
 0x179,0x20
 0x17a,0x0
 0x186,0x0
@@ -192,7 +192,7 @@ MSR_ADDR,VALUE
 0x47d,0x0
 0x47e,0x0
 0x47f,0x0
-0x6e0,0x1cdc14ccc
+0x6e0,0x24b5682a4
 0x800,0x0
 0x801,0x0
 0x802,0x0
@@ -452,10 +452,10 @@ MSR_ADDR,VALUE
 0xda0,0x0
 0xc0000080,0xd01
 0xc0000081,0x23001000000000
-0xc0000082,0xffffffff81800000
-0xc0000083,0xffffffff81801400
+0xc0000082,0xffffffff81600040
+0xc0000083,0xffffffff81601500
 0xc0000084,0x47700
-0xc0000100,0x7fb1b3927500
+0xc0000100,0x7fc489ee5740
 0xc0000101,0xffff88803ec00000
 0xc0000102,0x0
 0xc0000103,0x0
@@ -477,6 +477,7 @@ MSR_ADDR,VALUE
 0xc0010113,0x0
 0xc0010117,0x0
 0xc0011022,0x0
+0xc0011023,0x0
 0xc001102a,0x0
 0xc001102c,0x0
 0x400000000,0x0

diff --git a/tests/data/msr/msr_list_T2CL_INTEL_CASCADELAKE_5.10host_4.14guest.csv b/tests/data/msr/msr_list_T2CL_INTEL_CASCADELAKE_5.10host_4.14guest.csv
@@ -1,8 +1,8 @@
 MSR_ADDR,VALUE
 0,0x0
 0x1,0x0
-0x10,0x649c5d80
-0x11,0x1e14fc8
+0x10,0xb22538c0
+0x11,0x1ddaf68
 0x12,0x3ffdc001
 0x17,0x0
 0x1b,0xfee00d00
@@ -24,7 +24,7 @@ MSR_ADDR,VALUE
 0x140,0x0
 0x174,0x10
 0x175,0xfffffe0000003000
-0x176,0xffffffff81601830
+0x176,0xffffffff81601930
 0x179,0x20
 0x17a,0x0
 0x186,0x0
@@ -200,7 +200,7 @@ MSR_ADDR,VALUE
 0x619,0x0
 0x639,0x0
 0x641,0x0
-0x6e0,0x15cf9330a
+0x6e0,0x1b6ffb282
 0x800,0x0
 0x801,0x0
 0x802,0x0
@@ -460,9 +460,9 @@ MSR_ADDR,VALUE
 0xc0000080,0xd01
 0xc0000081,0x23001000000000
 0xc0000082,0xffffffff81600020
-0xc0000083,0xffffffff816018c0
+0xc0000083,0xffffffff816019e0
 0xc0000084,0x47700
-0xc0000100,0x7f5584638500
+0xc0000100,0x7f18b3b44740
 0xc0000101,0xffff88803fc00000
 0xc0000102,0x0
 0xc0000103,0x0
@@ -496,6 +496,7 @@ MSR_ADDR,VALUE
 0xc001020a,0x0
 0xc001020b,0x0
 0xc0011022,0x0
+0xc0011023,0x0
 0xc001102a,0x0
 0xc001102c,0x0
 0x400000000,0x0