General changes/improvements

.github/workflows/build-check.yml

@@ -11,7 +11,7 @@ jobs:
         uses: actions/checkout@v4
         with:
             submodules: recursive
-
+            token: ${{ secrets.PAT_TOKEN }}
       - name: Execute Make
         run: |
             if ! make; then

.github/workflows/format-check.yml

@@ -10,6 +10,7 @@ jobs:
     - uses: actions/checkout@v4
       with:
         submodules: recursive
+        token: ${{ secrets.PAT_TOKEN }}
     - name: Run clang-format style check for C/C++ sources
       uses: Northeastern-Electric-Racing/clang-format-action@main
       with:

Core/Inc/FreeRTOSConfig.h

@@ -51,7 +51,6 @@
 #if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
   #include <stdint.h>
   extern uint32_t SystemCoreClock;
-  void xPortSysTickHandler(void);
 #endif
 #ifndef CMSIS_device_header
 #define CMSIS_device_header "stm32f4xx.h"
@@ -164,7 +163,7 @@ standard names. */
 
 /* IMPORTANT: After 10.3.1 update, Systick_Handler comes from NVIC (if SYS timebase = systick), otherwise from cmsis_os2.c */
 
-#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 1
+#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 0
 
 /* USER CODE BEGIN Defines */
 /* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */

Core/Inc/adi_interaction.h

@@ -0,0 +1,231 @@
+#include "adBms6830Data.h"
+#include "bmsConfig.h"
+
+// --- BEGIN SET HELPERS ---
+
+/**
+ * @brief Set the status of the REFON bit.
+ * 
+ * @param chip Pointer to the chip to modify.
+ * @param state New state of the REFON bit.
+ */
+void set_REFON(cell_asic *chip, REFON state);
+
+/**
+ * @brief Set the C-ADC vs. S-ADC comparison voltage threshold 
+ * 
+ * @param chip Pointer to the chip to modify.
+ * @param threshold Threshold to set.
+ */
+void set_volt_adc_comp_thresh(cell_asic *chip, CTH threshold);
+
+void set_diagnostic_flags(cell_asic *chip, FLAG_D config);
+
+/**
+ * @brief Set the discharge state of a cell.
+ * 
+ * @param chip Pointer to chip with cell to modify.
+ * @param cell ID of cell to modify. Cell indexes start are from 1-16 (NOT ZERO INDEXED).
+ * @param discharge Cell discharge state. true to discharge, false to disable discharge.
+ */
+void set_cell_discharge(cell_asic *chip, uint8_t cell, bool discharge);
+
+/**
+ * @brief Set the state of the SOAKON bit to either enable or disable soak times.
+ * 
+ * @param chip Pointer to chip to configure
+ * @param state Enable or disable SOAKON
+ */
+void set_soak_on(cell_asic *chip, SOAKON state);
+
+/**
+ * @brief Set the soak time range.
+ * 
+ * @param chip Pointer to chip to configure
+ * @param range The range of time over which to soak for aux and aux2
+ */
+void set_aux_soak_range(cell_asic *chip, OWRNG range);
+
+/**
+ * @brief Set the open wire soak time. See data sheet for formula.
+ * 
+ * @param chip Pointer to chip configuration
+ * @param time The amount of time to soak for. Higher OWA is a higher soak time.
+ */
+void set_open_wire_soak_time(cell_asic *chip, OWA time);
+
+/**
+ * @brief Set the pull of a GPIO pin on an ADBMS8630.
+ * 
+ * @param chip ADBMS6830 chip
+ * @param gpio Number of the GPIO pin to change (1-10)
+ * @param input True is no pull down, False is pull down.
+ */
+void set_gpio_pull(cell_asic *chip, uint8_t gpio, bool input);
+
+/**
+ * @brief Set the corner frequency of the IIR filter.
+ * 
+ * @param chip Pointer to chip config
+ * @param freq Corner frequency (see IIR_FPA enum for frequencies)
+ */
+void set_iir_corner_freq(cell_asic *chip, IIR_FPA freq);
+
+/**
+ * @brief Configure a chip as a break in the isoSPI daisy chain.
+ * 
+ * @param chip Pointer to chip config
+ * @param is_break True if chip is break, false if chip is not break
+ */
+void set_comm_break(cell_asic *chip, bool is_break);
+
+/**
+ * @brief Enable/disable discharging through the mute discharge bit.
+ * 
+ * @param chip Pointer to chip config
+ * @param disable_discharge True to disable discharge, false to enable discharge.
+ */
+void set_mute_state(cell_asic *chip, bool disable_discharge);
+
+/**
+ * @brief Set whether or not this chip is taking a snapshot. The chip will not begin reading new values unless the snapshot bit is cleared.
+ * 
+ * @param chip Pointer to chip config
+ * @param take_snapshot True to take a snapshot, false to end the snapshot
+ */
+void set_snapshot(cell_asic *chip, bool take_snapshot);
+
+/**
+ * @brief Enable/disable the discharge timer monitor.
+ * 
+ * @param chip Pointer to chip config
+ * @param enabled True if discharge timer monitor is enabled, false if otherwise
+ */
+void set_discharge_timer_monitor(cell_asic *chip, bool enabled);
+
+/**
+ * @brief Configure the discharge timer range, which affects the resolution.
+ * 
+ * @param chip Pointer to chip config
+ * @param large True for large range, False for small range
+ */
+void set_discharge_timer_range(cell_asic *chip, bool large);
+
+/**
+ * @brief Set the discharge monitor timeout, which is dependent on the discharge timer range.
+ * 
+ * @param chip Pointer to chip config
+ * @param timeout Base for timeout multiplicaiton. Must be below six bits.
+ */
+void set_discharge_timeout(cell_asic *chip, uint8_t timeout);
+
+// --- END SET HELPERS ---
+
+// --- BEGIN WRITE COMMANDS ---
+
+/**
+ * @brief Write config registers. Wakes chips before writing.
+ * 
+ * @param chips Array of chips to write config registers of.
+ */
+void write_config_regs(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Clears all status regster C flags except the CS FLT
+ * 
+ * @param chips 
+ */
+void write_clear_flags(cell_asic chips[NUM_CHIPS]);
+
+// --- END WRITE COMMANDS ---
+
+// --- BEGIN READ COMMANDS ---
+
+/**
+ * @brief Read all filtered voltage results.  IIR must be on and ADC must be continous
+ * 
+ * @param chips The chips to read voltages from
+ */
+void read_filtered_voltage_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read every register connected to the AUX ADC.
+ * 
+ * @param chips Array of chips to get voltage readings of.
+ */
+void adc_and_read_aux_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read voltages in every register connected to AUX2 ADC.
+ * 
+ * @param chips Array of chips to get voltages of.
+ */
+void adc_and_read_aux2_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read status registers.
+ * 
+ * @param chips Array of chips to read.
+ */
+void read_status_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read status and aux registers in one command.
+ * 
+ * @param chips Array of chips to read.
+ */
+void read_status_aux_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read the serial ID of the chip.
+ * 
+ * @param chips Array of chips to read.
+ */
+void read_serial_id(cell_asic chips[NUM_CHIPS]);
+
+// --- END READ COMMANDS ---
+
+// --- BEGIN ADC POLL ---
+
+/**
+ * @brief Get voltage readings from the C-ADCs. Takes a single shot measurement.
+ * 
+ * @param chips Array of chips to get voltage readings from.
+ */
+void get_c_adc_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Get voltages from the S-ADCs. Makes a single shot measurement.
+ * 
+ * @param chip Array of chips to get voltage readings from.
+ */
+void get_s_adc_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Get the avgeraged cell voltages.
+ * 
+ * @param chip Array of chips to get voltage readings of.
+ */
+void get_avgd_cell_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Get the filtered cell volrages.
+ * 
+ * @param chip Array of chips to get voltage readings of.
+ */
+void get_filtered_cell_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Get the c and s adc voltages. Does this with RDCSALL command.
+ * 
+ * @param chips Array of chips to get voltage readings of.
+ */
+void get_c_and_s_adc_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Starts a continous c ADC conversion with S redundancy
+ * 
+ */
+void start_c_adc_conv();
+
+// --- END ADC POLL ---

Core/Inc/bmsConfig.h

@@ -2,6 +2,7 @@
 #define BMS_CONFIG_H
 
 #define DEBUG_MODE_ENABLED true
+#define DEBUG_STATS
 
 // Hardware definition
 #define NUM_SEGMENTS	1

Core/Inc/segment.h

@@ -12,10 +12,15 @@ void segment_init(acc_data_t *bmsdata);
 /**
  * @brief Pulls all cell data from the segments and returns all cell data
  *
- * @todo make sure that retrieving cell data doesn't block code too much
  */
 void segment_retrieve_data(acc_data_t *bmsdata);
 
+/**
+ * @brief Fetch extra data for segment
+ * 
+ */
+void segment_retrieve_debug_data(acc_data_t *bmsdata);
+
 /**
  * @brief Disables balancing for all cells.
  *
@@ -32,15 +37,6 @@ void segment_disable_balancing(acc_data_t *bmsdata);
 void segment_configure_balancing(
 	acc_data_t *bmsdata, bool discharge_config[NUM_CHIPS][NUM_CELLS_ALPHA]);
 
-/**
- * @brief Returns if a specific cell is balancing
- *
- * @param chip_num
- * @return true
- * @return false
- */
-bool cell_is_balancing(uint8_t chip_num, uint8_t cell_num);
-
 /**
  * @brief Returns if any cells are balancing.
  * 
@@ -73,6 +69,6 @@ void read_serial_id(cell_asic chips[NUM_CHIPS]);
  * 
  * @param chips Array of chips to get voltages of.
  */
-void read_aux2_registers(cell_asic chips[NUM_CHIPS]);
+void adc_and_read_aux2_registers(cell_asic chips[NUM_CHIPS]);
 
 #endif

Core/Inc/stm32f4xx_hal_conf.h

@@ -214,7 +214,7 @@
 #define MAC_ADDR5   0U
 
 /* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                 /* buffer size for receive               */
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    4U       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
 #define ETH_TXBUFNB                    4U       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */

Core/Inc/stm32f4xx_it.h

@@ -52,12 +52,13 @@ void MemManage_Handler(void);
 void BusFault_Handler(void);
 void UsageFault_Handler(void);
 void DebugMon_Handler(void);
-void SysTick_Handler(void);
-void CAN1_RX0_IRQHandler(void);
 void DMA1_Stream4_IRQHandler(void);
+void CAN1_RX0_IRQHandler(void);
+void TIM3_IRQHandler(void);
 void UART4_IRQHandler(void);
 void DMA2_Stream0_IRQHandler(void);
 void CAN2_RX0_IRQHandler(void);
+void CAN2_RX1_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */