Image v2.6.0 merge (#7)

* DSP-PYNQ upgrade to 2020.1, scipy upgrade for deprecation warnings (#5)

* upgraded ZCU111 design to Vivado 2020.1

* updated block design to Vivado 2020.1

* xlnk deprecated, replaced with allocate

* added zcu111 bitstream

* added scipy 1.12 dependency

* Ultra96 upgrade to 2020.1

Co-authored-by: Lewis Davin McLaughlin <[email protected]>

* Updating DSP PYNQ for PYNQv2.6 release (#6)

Co-authored-by: Sarunas Kalade <[email protected]>
Co-authored-by: Lewis Davin McLaughlin <[email protected]>

README.md

@@ -10,7 +10,7 @@ This repo supports the following boards:
 > The Ultra96 version of the design only supports Jupyter Notebooks.
 
 ## Getting started
-All the material in this repo is available on the v2.4.1 PYNQ image for the ZCU111 - as part of the [PYNQ RFSoC Workshop](https://github.com/Xilinx/PYNQ_RFSOC_Workshop). This is not the case for the Ultra96, meaning this repo has to be installed separately if using that board.
+All the material in this repo is available on several PYNQ verions for the ZCU111 - and is included in the [PYNQ RFSoC Workshop](https://github.com/Xilinx/PYNQ_RFSOC_Workshop). This is not the case for the Ultra96, meaning this repo has to be installed separately if using that board.
 
 The SD card images for both boards can be downloaded from the [PYNQ website](http://www.pynq.io/board.html) and burned to a micro SD card with at least 8GB capacity.
 
@@ -19,8 +19,13 @@ To install this repo separately, follow the instructions below.
 ### Overlay installation
 We supply a pre-built wheel containing the bitstream for that tagged release. This can be installed directly with Pip using the Terminal built in to JupyterLab.
 ```sh
-# pip3 install https://github.com/Xilinx/DSP-PYNQ/releases/download/v1.0_$BOARD/dsp_pynq-1.0-py3-none-any.whl
-# python3 -c 'import dsp_pynq; dsp_pynq.install_notebooks()'
+# PYNQ v2.4.1 v2.5
+pip3 install https://github.com/Xilinx/DSP-PYNQ/releases/download/v1.0_$BOARD/dsp_pynq-1.0-py3-none-any.whl
+
+# PYNQ v2.6
+pip3 install https://github.com/Xilinx/DSP-PYNQ/releases/download/v2.0_$BOARD/dsp_pynq-2.0-py3-none-any.whl
+
+python3 -c 'import dsp_pynq; dsp_pynq.install_notebooks()'
 ```
 The notebooks should then be available from the Jupyter file browser inside the `dsp_pynq` directory.
 

boards/Ultra96/create_project.tcl

@@ -1,7 +1,7 @@
 set proj_name "dsp_pynq"
 
-create_project ${proj_name} ./${proj_name} -part xczu3eg-sbva484-1-e
-set_property BOARD_PART em.avnet.com:ultra96v2:part0:1.0 [current_project]
+create_project ${proj_name} ./${proj_name} -part xczu3eg-sbva484-1-i
+#set_property BOARD_PART em.avnet.com:ultra96v2:part0:1.0 [current_project]
 set_property target_language VHDL [current_project]
 
 source ./block_design.tcl
@@ -11,7 +11,7 @@ update_compile_order -fileset sources_1
 launch_runs impl_1 -to_step write_bitstream -jobs 16
 wait_on_run impl_1
 
-# get bitstream and hwh files
+#get bitstream and hwh files
 if {![file exists ./bitstreams/]} {
 	file mkdir ./bitstreams/
 	}

dsp_pynq/notebooks/01_dsp_and_python.ipynb

@@ -223,7 +223,17 @@
     "\n",
     "### Plotting in the frequency domain\n",
     "\n",
-    "We can use SciPy to perform a Fast Fourier Transform (FFT) to convert our time domain signal into the frequency domain. The `fft` function performs an FFT for our input. Let's try this out on the small audio clip from above."
+    "We can use SciPy to perform a Fast Fourier Transform (FFT) to convert our time domain signal into the frequency domain. The `fft` function performs an FFT for our input. Let's try this out on the small audio clip from above.  Note we will first suppress FutureWarnings from scipy - these warnings are meant for Python package features that will be deprecated in the future."
+   ]
+  },
+  {
+   "cell_type": "code",
+   "execution_count": null,
+   "metadata": {},
+   "outputs": [],
+   "source": [
+    "import warnings\n",
+    "warnings.simplefilter(action='ignore', category=FutureWarning)"
    ]
   },
   {

dsp_pynq/notebooks/02_dsp_and_pynq.ipynb

@@ -138,31 +138,13 @@
     "fft_config = ol.fft.fft_config"
    ]
   },
-  {
-   "cell_type": "markdown",
-   "metadata": {},
-   "source": [
-    "We also need to create a Xlnk object, which is used to allocate PS memory for our IP on the PL."
-   ]
-  },
-  {
-   "cell_type": "code",
-   "execution_count": null,
-   "metadata": {},
-   "outputs": [],
-   "source": [
-    "from pynq import Xlnk\n",
-    "\n",
-    "xlnk = Xlnk()"
-   ]
-  },
   {
    "cell_type": "markdown",
    "metadata": {},
    "source": [
     "The IP will be set up for a forward FFT with a selected scaling schedule. We do this by sending a single, 16-bit packet to the FFT AXI4-Stream config port. This involves a few steps:\n",
     "  - First we create our config packet (in this case it's easier to show in binary) \n",
-    "  - Next we create a contiguous memory buffer using the Xlnk object\n",
+    "  - Next we create a contiguous memory buffer using allocate()\n",
     "  - Then we fill our buffer with the config packet\n",
     "  - Finally we transfer our packet to the DMA\n",
     "    \n",
@@ -176,6 +158,8 @@
    "metadata": {},
    "outputs": [],
    "source": [
+    "from pynq import allocate\n",
+    "\n",
     "def get_config_value(forwards, scaling_sched):\n",
     "    val = 0\n",
     "    for scaling in scaling_sched:     # [14:1] = scaling schedule\n",
@@ -184,7 +168,7 @@
     "\n",
     "config_value = get_config_value(True, [1, 1, 2, 2, 2, 2, 2])\n",
     "\n",
-    "fft_buffer_config = xlnk.cma_array(shape=(1,),dtype=np.int16)\n",
+    "fft_buffer_config = allocate(shape=(1,),dtype=np.int16)\n",
     "\n",
     "fft_buffer_config[0] = config_value\n",
     "\n",
@@ -238,8 +222,8 @@
     "    # increase length to multiple of NFFT\n",
     "    signal = np.int32(np.append(signal, np.zeros(zeros)))\n",
     "    \n",
-    "    fft_in_buffer = xlnk.cma_array(shape=(NFFT,),dtype=np.int32)\n",
-    "    fft_out_buffer = xlnk.cma_array(shape=(NFFT*2,),dtype=np.int16)\n",
+    "    fft_in_buffer = allocate(shape=(NFFT,),dtype=np.int32)\n",
+    "    fft_out_buffer = allocate(shape=(NFFT*2,),dtype=np.int16)\n",
     "    \n",
     "    fft_out = np.zeros(len(fft_out_buffer))\n",
     "    \n",
@@ -397,7 +381,7 @@
    "outputs": [],
    "source": [
     "# Create DMA buffer for coefs\n",
-    "fir_buffer_reload = xlnk.cma_array(shape=(len(hpf_coeffs_hw),),dtype=np.int16)\n",
+    "fir_buffer_reload = allocate(shape=(len(hpf_coeffs_hw),),dtype=np.int16)\n",
     "\n",
     "# Copy coefs to buffer\n",
     "for i in range(len(hpf_coeffs_hw)):\n",
@@ -408,7 +392,7 @@
     "dma_reload.sendchannel.wait()\n",
     "\n",
     "# Send an empty 8-bit packet to FIR config port to complete reload\n",
-    "fir_buffer_config = xlnk.cma_array(shape=(1,),dtype=np.int8)\n",
+    "fir_buffer_config = allocate(shape=(1,),dtype=np.int8)\n",
     "fir_buffer_config[0] = 0\n",
     "dma_config.sendchannel.transfer(fir_buffer_config)\n",
     "dma_config.sendchannel.wait()\n",
@@ -438,8 +422,8 @@
     "aud_hw = np.int16(aud_hw)\n",
     "\n",
     "# Create DMA buffer\n",
-    "fir_in_buffer = xlnk.cma_array(shape=(len(aud_hw),),dtype=np.int16)\n",
-    "fir_out_buffer = xlnk.cma_array(shape=(len(aud_hw),),dtype=np.int32)\n",
+    "fir_in_buffer = allocate(shape=(len(aud_hw),),dtype=np.int16)\n",
+    "fir_out_buffer = allocate(shape=(len(aud_hw),),dtype=np.int32)\n",
     "\n",
     "# Copy aud_hw to buffer\n",
     "for i in range(len(aud_hw)):\n",
@@ -541,5 +525,5 @@
   }
  },
  "nbformat": 4,
- "nbformat_minor": 2
+ "nbformat_minor": 4
 }

setup.py

@@ -69,11 +69,12 @@ def make_file_list():
 
 setup(
     name="dsp_pynq",
-    version='1.0',
+    version='2.0',
     install_requires=[
         'pynq>=2.4',
         'plotly>=3.8.1',
         'plotly-express>=0.1.7',
+        'scipy>=1.2.0',
     ],
     url='https://github.com/Xilinx/DSP-PYNQ',
     license='BSD 3-Clause License',