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Fix ad7124 #1521

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merged 3 commits into from
Dec 4, 2024
Merged

Fix ad7124 #1521

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ff03a02
ad7124: Tie MISO to GPIO
sarpadi Oct 7, 2024
6561523
ad7124: Update docs
sarpadi Oct 8, 2024
afdf964
ad7124/de10nano: Change SYS SPI ref clock to 80MHz
sarpadi Oct 28, 2024
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6 changes: 5 additions & 1 deletion docs/projects/ad7124_asdz/index.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -92,7 +92,7 @@ The Software GPIO number is calculated as follows:

.. list-table::
:widths: 25 25 25 25
:header-rows: 2
:header-rows: 3

* - GPIO signal
- Direction
Expand All @@ -106,6 +106,10 @@ The Software GPIO number is calculated as follows:
- INPUT
- 32
- 0
* - spi_miso
- INPUT
- 33
- 1

Building the HDL project
-------------------------------------------------------------------------------
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8 changes: 8 additions & 0 deletions projects/ad7124_asdz/de10nano/system_qsys.tcl
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Expand Up @@ -14,6 +14,14 @@ set_instance_parameter_value sys_gpio_in {irqType} {EDGE}
set_instance_parameter_value sys_spi {clockPolarity} {0}
set_instance_parameter_value sys_spi {targetClockRate} {20000000.0}

# change sys spi ref clock to 80MHz

remove_connection sys_clk.clk/sys_spi.clk
remove_connection sys_clk.clk_reset/sys_spi.reset

add_connection sys_dma_clk.clk sys_spi.clk
add_connection sys_dma_clk.clk_reset sys_spi.reset

#system ID
set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {ROM_ADDR_BITS} {9}
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3 changes: 2 additions & 1 deletion projects/ad7124_asdz/de10nano/system_top.v
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Expand Up @@ -139,7 +139,7 @@ module system_top (

// adc control gpio assign

assign gpio_i[63:33] = gpio_o[63:33];
assign gpio_i[63:34] = gpio_o[63:34];
assign gpio_i[31:15] = gpio_o[31:15];

// bd gpio
Expand All @@ -148,6 +148,7 @@ module system_top (
assign gpio_bd_o[7:0] = gpio_o[7:0];

assign gpio_i[32] = sync_err;
assign gpio_i[33] = spi_miso;

// IO Buffers for I2C

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