handle complete issue

chipsalliance · Nov 3, 2023 · 5e125fa · 5e125fa
1 parent cbed2f4
commit 5e125fa
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Showing 2 changed files with 5 additions and 3 deletions.
diff --git a/frontends/systemverilog/uhdm_ast.cc b/frontends/systemverilog/uhdm_ast.cc
@@ -2390,7 +2390,7 @@ void UhdmAst::process_module()
         shared.top_nodes[module_node->str] = module_node;
         visit_one_to_many({vpiParamAssign}, obj_h, [&](AST::AstNode *node) {
             if (node) {
-                if (node->children[0]->type != AST::AST_CONSTANT) {
+                if ((!node->children.empty()) && ((node->children[0]->type != AST::AST_CONSTANT))) {
                     if (shared.top_nodes[type]) {
                         simplify_parameter(node, module_node);
                         log_assert(node->children[0]->type == AST::AST_CONSTANT || node->children[0]->type == AST::AST_REALVALUE);

diff --git a/tests/simple_tests/ParameterType/dut.sv b/tests/simple_tests/ParameterType/dut.sv
@@ -1,6 +1,8 @@
 module dut(input logic clk, input logic i, output logic o);
- localparam int GW_CONFIG2[2:0] = '{default:0} ;
+ sub sub(clk, i, o);
+endmodule
 
+module sub(input logic clk, input logic i, output logic o);
+ localparam int GW_CONFIG2[2:0] = '{default:0} ;
  assign o = i;
-
 endmodule