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Fix CMake build on macOS #2133

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merged 1 commit into from
Nov 11, 2023
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The new CMake-based build system almost works on macOS, but fails at the final step when linking the plugin. This is because the default behavior on macOS (for both clang and GCC) is to require all symbols to be defined at link time for a dynamic library. This is not the case for synlig, so it fails to link.

Failing linker output
[100%] Linking CXX shared library /opt/synlig/install/share/yosys/plugins/systemverilog.dylib
ld: warning: ignoring duplicate libraries: 'third_party/surelog/third_party/UHDM/lib/libuhdm.a'
ld: Undefined symbols:
  Yosys::log_header(Yosys::RTLIL::Design*, char const*, ...), referenced from:
      systemverilog_plugin::UhdmAstFrontend::call_log_header(Yosys::RTLIL::Design*) in uhdm_ast_frontend.cc.o
      systemverilog_plugin::UhdmSurelogAstFrontend::call_log_header(Yosys::RTLIL::Design*) in uhdm_surelog_ast_frontend.cc.o
      systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream<char, std::__1::char_traits<char>>*&, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::vector<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::allocator<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o
  Yosys::log_signal(Yosys::RTLIL::SigSpec const&, bool), referenced from:
      systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream<char, std::__1::char_traits<char>>*&, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::vector<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::allocator<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o
      systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream<char, std::__1::char_traits<char>>*&, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::vector<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::allocator<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o
      systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream<char, std::__1::char_traits<char>>*&, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::vector<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::allocator<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o
      systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream<char, std::__1::char_traits<char>>*&, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::vector<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, std::__1::allocator<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
  Yosys::logv_error(char const*, __va_list_tag*), referenced from:
      systemverilog_plugin::UhdmAst::report_error(char const*, ...) const in uhdm_ast.cc.o
  Yosys::log_warning(char const*, ...), referenced from:
      systemverilog_plugin::UhdmAst::process_object(unsigned int*) in uhdm_ast.cc.o
      systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o
      systemverilog_plugin::UhdmAst::process_operation(UHDM::BaseClass const*) in uhdm_ast.cc.o
      systemverilog_plugin::UhdmAst::process_operation(UHDM::BaseClass const*) in uhdm_ast.cc.o
      systemverilog_plugin::UhdmAst::process_unsupported_stmt(UHDM::BaseClass const*, bool) in uhdm_ast.cc.o
      systemverilog_plugin::const2ast(std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, char, bool) in synlig_const2ast.cc.o
      my_strtobin(std::__1::vector<Yosys::RTLIL::State, std::__1::allocator<Yosys::RTLIL::State>>&, char const*, int, int, char, bool) in synlig_const2ast.cc.o
      ...
  Yosys::AST_INTERNAL::current_ast, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
  Yosys::AST_INTERNAL::flag_mem2reg, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
  Yosys::AST_INTERNAL::current_block, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      ...
  Yosys::AST_INTERNAL::current_scope, referenced from:
      systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o
      systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o
      systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      ...
  Yosys::AST_INTERNAL::flag_autowire, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
  Yosys::AST_INTERNAL::current_always, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      ...
  Yosys::AST_INTERNAL::flag_nomem2reg, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
  Yosys::AST_INTERNAL::flag_nomeminit, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
  Yosys::AST_INTERNAL::current_ast_mod, referenced from:
      systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o
      systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o
      systemverilog_plugin::setup_current_scope(std::__1::unordered_map<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>, Yosys::AST::AstNode*, std::__1::hash<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::equal_to<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>>>, std::__1::allocator<std::__1::pair<std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char>> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::simplify_sv(Yosys::AST::AstNode*, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::UhdmAst::simplify_parameter(Yosys::AST::AstNode*, Yosys::AST::AstNode*) in uhdm_ast.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      ...
  Yosys::AST_INTERNAL::current_top_block, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
  Yosys::AST_INTERNAL::current_block_child, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      ...
  Yosys::AST_INTERNAL::current_memwr_count, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
  Yosys::AST_INTERNAL::current_memwr_visible, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      ...
  Yosys::AST_INTERNAL::current_always_clocked, referenced from:
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o
      ...
[more...]

This PR adds the -undefined dynamic_lookup flag when built under macOS to allow undefined symbols at link time, similar to the behavior under Linux.

Additionally, yosys looks for plugins with a .so extension, so this is enforced instead of the macOS default of .dylib.

Works on macOS 14.1 with clang 15 and CMake 3.27.7

@alaindargelas alaindargelas requested a review from kgugala November 8, 2023 00:17
CMakeLists.txt Outdated
@@ -253,6 +253,9 @@ if(WIN32)
add_compile_definitions(WIN32_LEAN_AND_MEAN)
endif()

# Ensure dynamic library extension is always .so
set(CMAKE_SHARED_LIBRARY_SUFFIX ".so")
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is this OK for Windows? There is some windows specific code in this file, so I assume we can run the build for Windows using it

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I just tried building on Windows using MSYS2, using both the UCRT64 and MINGW64 environments. Both result in Yosys not building (TARGET_PDB_FILE not supported by linker for UCRT64 and -rdynamic not supported for MINGW64, probably because CMake can't identify the environment in that latter case). Both errors are unrelated to these changes since it never gets to even build synlig. oss-cad-suite-build doesn't contain yosys-config.cmake which this CMakeLists requires to find Yosys, so I'm not sure how to use a pre-built version of Yosys. I'm going to call it quits after spending a couple hours trying to get this to build, so if someone else has a working Windows build environment, go for it.

Regardless, I made this change since it appears Yosys looks for .so files regardless of platform.

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thanks for checking this.

I triggered the CI, once it's green I'll merge the PR

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@aWZHY0yQH81uOYvH aWZHY0yQH81uOYvH Nov 10, 2023

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I just noticed the following change would fit in better with the existing line above it. I'm testing a build rn if you'd prefer it this way.

--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -253,9 +253,6 @@ if(WIN32)
   add_compile_definitions(WIN32_LEAN_AND_MEAN)
 endif()
 
-# Ensure dynamic library extension is always .so
-set(CMAKE_SHARED_LIBRARY_SUFFIX ".so")
-
 # Put source code here, files that are generated at build time in
 # surelog_generated_SRC
 set(synlig_SRC
@@ -293,6 +290,7 @@ set_target_properties(
   synlig PROPERTIES SOVERSION "${SYNLIG_VERSION_MAJOR}.${SYNLIG_VERSION_MINOR}")
 set_target_properties(synlig PROPERTIES OUTPUT_NAME "systemverilog")
 set_target_properties(synlig PROPERTIES PREFIX "")
+set_target_properties(synlig PROPERTIES SUFFIX ".so")
 
 # Allow undefined symbols at link time on macOS. These symbols should already be
 # present within yosys when the plugin is loaded.

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makes sense, the code will be cleaner. Please push it and I'll retrigger the CI

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OK, done. Still works on my Mac.

@kgugala kgugala merged commit 95ee06a into chipsalliance:main Nov 11, 2023
32 checks passed
@aWZHY0yQH81uOYvH aWZHY0yQH81uOYvH deleted the fix-mac-cmake branch November 11, 2023 05:46
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3 participants