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Add support of CH390H both in esp_eth and its examples (IDFGH-12259) #13306
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👋 Hello SergeyKharenko, we appreciate your contribution to this project! 📘 Please review the project's Contributions Guide for key guidelines on code, documentation, testing, and more. 🖊️ Please also make sure you have read and signed the Contributor License Agreement for this project. Click to see more instructions ...
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@SergeyKharenko nice job! Thank you for the PR. Community surely appreciate adding support of CH390! We only need to internally discuss if to add support directly to ESP-IDF or to maintain it at https://github.com/espressif/esp-eth-drivers. I let you know. |
No problem, I'll stay tuned! It is certainly a good idea to separate the network driver from the mainline. |
Due to my lack of experience with PRs, I mistakenly submitted the |
@SergeyKharenko Thanks for your contribution, follow this topic I'd like to share few "painful" debugging process about CH390H. I happen to have both DM9051 and CH390H chips, and also tested CH390H based on the DM9051 code, but I ran into a lot of hidden problems:
CH390H just announces it can replace DM9051, and provide document looks same as DM9051 (But they are not really same as my expected, and no docs mention the differences). The only thing you can do is guess and experiment, I am not sure what other problems users will encounter when using registers outside the CH390 official's demo example.
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And the "official" blog indicate that CH390H have a TX RX probabilistic offset error problem. We also need to provide workaround if add support. |
@SergeyKharenko we discussed internally and we decided that the CH390 should be distributed as separate component via Component registry. Could you please open PR at https://github.com/espressif/esp-eth-drivers @leeebo thanks for additional insight! It would be great if you helped us to review the PR once opened at https://github.com/espressif/esp-eth-drivers. It would be much appreciated. |
What a coincidence to meet you here! I have read you blog. It provides me with very valuable experience!🥰🥰🥰 |
@kostaond I have committed the PR in I have to acknowledge these bugs mentioned by @leeebo . However, at least during my benchmark using iperf(over 10 min), no error log was reported(corresponding to RX TX offset error will case error log). I think the locking mechanism for the SPI and DMA transmission protects the chip from interruption when ESP r/w its SRAM. |
@SergeyKharenko Thanks, will help review your PR |
Duplicates espressif/esp-eth-drivers#23 |
CH390H is the first ethernet controller integrated with both MAC and PHY designed by NanjingQinhengMicroelectronics CO LTD (abbreviated as WCH). It could perfectly replace DM9051. Besides, the peripheral circuit of CH390H is much more simple than that of DM9051. What's more, CH390H is integrated with a hardware-defined globally unique MAC address. Therefore that simplifies the configuration of the chip.
However, this chip is released around 2023 Q2. WCH only provides sample code on the CH32V series platform. As far as I know, there is no existing example that successfully migrated this chip on
ESP-IDF
. In this case, my work is meaningful.My work can mainly be divided into the following steps:
ESP-IDF
about DM9051xxx_get_recv_byte_count
andemac_xxx_receive
. I don't think repetitively reading the length of the data is an efficient strategy.Kconfig
, so that it can be chosen in several examples provided byEDP-IDF
.iperf
created byShow Example Projects
in Visual Studio Code. The result is shown in the below table. Both transmit and receive increase LINEARLY as the SPI frequency increases. From this result, it can be concluded that the current performance bottleneck is mainly in the SPI frequency rather than the driver layer (CH390H can run SPI at a frequency up to 50MHz).Before this PR, I also consulted WCH about the copyright, for the reason that I have used the register definition of this chip which directly comes from their example project. They just told me I am free to develop and share these codes.
PS:
Here is the introduction to this ethernet controller in detail(translated from its official website):
CH390 is an industrial-grade Ethernet controller IC with 10/100M Ethernet Media Transport Layer (MAC) and Physical Layer Transceiver (PHY), supporting CAT3, 4, 5 and CAT5, and 6 connections for 10BASE-TX and 100BASE-TX, supporting HP Auto-MDIX, low power design, and IEEE 802.3u compliant. The CH390 has a built-in 16K byte SRAM, and supports 3.3V or 2.5V parallel interface and SPI serial interface.