Skip to content

v1.0.0-eng
Compare
Choose a tag to compare
@nss1588 nss1588 released this 02 Jan 20:44
· 5 commits to main since this release
v1.0.0
4e20e87
This commit was created on GitHub.com and signed with GitHub’s verified signature.
GPG key ID: B5690EEEBB952194
Verified
Learn about vigilant mode.

v1.0.0 is the first Azurite Linux PHC and DPLL manager Engineering release.

New Features

  • [TS-7823] Added new functions zl80732_ptp_adjphase() and zl80732_ptp_getmaxphase().

  • [TS-8035] Added support for the dpll_pin_ops and the dpll_device_ops interfaces. Added defines ZL3073X_DPLL_NETLINK_ENABLED and ZL3073X_PHC_ENABLED
    to zl3073x_probe().

  • [TS-8036] Added zl3073x_dpll_raw_mode_get() function to get the DPLL mode.

  • [TS-8037] Added zl3073x_dpll_lock_status_get() and
    zl3073x_dpll_map_raw_to_manager_lock_status() functions.

  • [TS-8038] Added function zl3073x_dpll_pin_state_on_dpll_get() to implement state_on_dpll_get() from the dpll_pin_ops interface.

  • [TS-8040] Added function zl3073x_dpll_pin_direction_get() to implement direction_get() from the dpll_pin_ops interface.

  • [TS-8041] added
    zl3073x_dpll_get_priority_ref() and zl3073x_dpll_set_priority_ref().

  • [TS-8044] Added function zl3073x_dpll_pin_phase_offset_get() to implement phase_offset_get() from the dpll_pin_ops interface.

  • [TS-8046] Added function zl3073x_dpll_pin_ffo_get() to implement ffo_get() from the dpll_pin_ops interface.

  • [TS-8047] Added the following functions to implement esync_get() and esync_set() from the dpll_pin_ops interface:
    zl3073x_dpll_input_pin_esync_get()
    zl3073x_dpll_input_pin_esync_set()
    zl3073x_dpll_output_pin_esync_get()
    zl3073x_dpll_output_pin_esync_set().

Other Minor Changes

  • [TS-7825] Added zl80732_dpll_init_fine_phase_adjust() to fix firmware bug generating wrong synthesizer cycle.

  • [TS-7899] Updated zl80732_ptp_adjtime() to apply the entire provided offset, and fixed issue with the ToD register updates.

  • [TS-8070] Added zl3073x_dpll_get_input_frequency() and zl3073x_dpll_set_input_frequency for DPLL manager.

  • [TS-8073] Added zl3073x_dpll_get_output_phase_adjust() and zl3073x_dpll_set_output_phase_adjust() functions for DPLL manager.

  • [TS-8101] Changed handling of error status of zl3073x_read() and zl3073x_write().

  • [TS-8127] Added dpll_pin_change_ntf() and dpll_device_change_ntf() to support DPLL subsystem notification.

  • [TS-8129] Split dpll_pin_ops into separate interfaces for inputs and outputs.

  • [TS-8139] Added board config defines CONFIG_MD_990_0011_REV_8 and CONFIG_MD_990_0011_REV_A.

Full Changelog: https://github.com/microchip-ung/tcg-phc-dpll/commits/v1.0.0

Assets 2
Loading