GitHub - nemo11/Reconfigurable-Design-Verilog-

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
2_1Mux.v		2_1Mux.v
BCD2GRAY.v		BCD2GRAY.v
FA_using_HA.v		FA_using_HA.v
GRAY2BCD.v		GRAY2BCD.v
SR_flipflop.v		SR_flipflop.v
SevenSegment.v		SevenSegment.v
asd.v		asd.v
asd1.v		asd1.v
comparator.v		comparator.v
cone_bit_comparator.v		cone_bit_comparator.v
four_1_using_2_1mux.v		four_1_using_2_1mux.v
four_bit_adder.v		four_bit_adder.v
four_bit_array_multiplier.v		four_bit_array_multiplier.v
fulladder.v		fulladder.v
half_adder_structural.v		half_adder_structural.v
lab1.v		lab1.v
one_bit_comparator.v		one_bit_comparator.v
two_one_Mux.v		two_one_Mux.v