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    6 repositories

    • logik

      Public
      A configurable RTL to bitstream FPGA toolchain
      Python
      •
      MIT License
      •7•256•1•1•Updated Dec 2, 2024Dec 2, 2024

    • umi

      Public
      Universal Memory Interface (UMI)
      Verilog
      •
      Apache License 2.0
      •12•142•6•2•Updated Dec 2, 2024Dec 2, 2024

    • switchboard

      Public
      Communication framework for RTL simulation and emulation.
      Python
      •
      Apache License 2.0
      •21•264•35•1•Updated Nov 25, 2024Nov 25, 2024

    • ebrick-demo

      Public
      Demo: how to create a custom EBRICK
      SystemVerilog
      •
      Apache License 2.0
      •0•16•0•1•Updated Nov 20, 2024Nov 20, 2024

    • sbtest

      Public
      Docker image with RTL simulation tools preinstalled
      Dockerfile
      •
      Apache License 2.0
      •0•0•0•0•Updated May 15, 2024May 15, 2024

    • zaui

      Public
      Generate a website from markdown with a minimum of fuss.
      Svelte
      •
      MIT License
      •0•9•2•1•Updated Apr 4, 2024Apr 4, 2024