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[vector crypto] Clarifying mandate for vector register index alignment to LMUL/EMUL #1653

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merged 10 commits into from
Nov 26, 2024
11 changes: 11 additions & 0 deletions src/vector-crypto.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -269,6 +269,17 @@ Element Group Size (`EGS`).
LMUL constraints::
For element-group instructions, `LMUL`*`VLEN` must always be at least as large as `EGW`, otherwise an
_illegal instruction exception_ is raised, even if `vl`=0.
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A *Vector Element Group* operand or destination sets `EMUL = LMUL`.
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A *Scalar Element Group* operand or destination sets `EMUL = ceil(EGW / VLEN)`.
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The standard RISC-V Vector mandates on vector register group indices alignment to `EMUL` apply: operand or destination register indices must be aligned to `EMUL`, all other non-aligned cases are __reserved__.
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[NOTE]
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These `EMUL` alignement constraints allow scalar element group operands to be allocated to any vector register group (without need to be aligned to `LMUL`) for any implementation with `VLEN >= EGW`.
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