[P1] Provide e2e simulation/verification for ring-multi-cgra

[tancheng]

Provide e2e simulation/verification for ring-multi-cgra with the proper dump traces. Blocked by:

• [P2] Simulation traces are not understandable for human being #23
• [P1] Integrate NoC to scale it up/out #29
• Xbar between the tiles and the data SRAM #37

[tancheng]

• Mimic https://github.com/tancheng/VectorCGRA/blob/master/cgra/translate/CGRAMemRightAndBottomRTL_matmul_2x2_test.py to create one using https://github.com/tancheng/VectorCGRA/blob/master/cgra/CGRAWithCrossbarDataMemRTL.py.
• Replace the meaningless test in https://github.com/tancheng/VectorCGRA/pull/47/files#diff-20a210aa7ce7b60a61cfb3492f6a04b673e4163e3e93528757429fd2adef2cd2 with a load/store-intensive one.
• Replace the meaningless test in https://github.com/tancheng/VectorCGRA/pull/47/files#diff-8975d4034932692990458da1eee7dccec0ef1ae1d55b60184b4f620b6ed7bdd3 with one with remote access.

[tancheng]

For the matmul on ring-multi-cgra, I would suggest 2x2 CGRAs, each CGRA contains 2x2 tiles, so in total 4x4 matmul.

[yuqisun]

Hi Cheng,

I'm going through the sample of CGRAMemRightAndBottomRTL_matmul_2x2_test.py, is there update for this as there's no such file in the latest master.

And we are now using structure Option1 or Option2 or both exist now?

Thanks,

[tancheng]

Plz just look into https://github.com/tancheng/VectorCGRA/blob/845e3c0e07902c286da3cb641c3ad1692027a779/systolic/test/Cgra3x3MemRightAndBottomRTL_matmul_2x2_test.py.

Option2 would be used, and option1 is deprecated in my sooner landind PR.