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20 Open 12 Closed
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Issues list

Classifier
#83 opened Nov 12, 2023 by jjm469
@sts200 @tomaschoi03
@ayc62 @jjm469
tmux
#82 opened Nov 11, 2023 by jjm469
1
Quick Access New Member tutorials
#69 opened Oct 21, 2023 by jjm469
@jjm469
2
Building ASIC Flow into repository I: Macros/Tools Internal: relating to macros and internal tools for the c2s2_ip
#61 opened Oct 9, 2023 by UnsignedByte
1
@UnsignedByte
Verilator checks should output github actions format I: Macros/Tools Internal: relating to macros and internal tools for the c2s2_ip
#47 opened Sep 24, 2023 by UnsignedByte
Formalize Port/Parameter Names for Val/Rdy, Width, etc. documentation Improvements or additions to documentation S: Discussion Needed Status: Topic needs urgent discussion
#40 opened Sep 23, 2023 by UnsignedByte
3
Configuration Register / Wishbone Bus I: Block Internal: Represents a verilog block for the IP I: Verification Internal: Relating to testing/verification for a block.
#32 opened Sep 17, 2023 by jjm469
@mattielee @ayc62
Generating SRAMs I: Block Internal: Represents a verilog block for the IP S: Needs Thinking Status: A change that needs thinking before it can become actionable.
#31 opened Sep 16, 2023 by gabizon103
@gabizon103
1
Fixed Point Sqrt block I: Block Internal: Represents a verilog block for the IP
#29 opened Sep 11, 2023 by UnsignedByte
@sts200 @tomaschoi03 @jjm469
1
Floating Point Arithmetic Blocks I: Block Internal: Represents a verilog block for the IP
#28 opened Sep 10, 2023 by jjm469
@mattielee @VickyLe03
1
Distance Accelerator I: Block Internal: Represents a verilog block for the IP
#27 opened Sep 10, 2023 by jjm469
1
Digital to Analog Converter (DAC) S: Needs Thinking Status: A change that needs thinking before it can become actionable.
#26 opened Sep 10, 2023 by jjm469
1
Phase Locked Loop (PLL) I: Block Internal: Represents a verilog block for the IP
#25 opened Sep 10, 2023 by jjm469
3
Direct Digital Synthesizer Using Verilog I: Block Internal: Represents a verilog block for the IP
#23 opened Sep 10, 2023 by sts200
@sts200
4
Git Tutorial documentation Improvements or additions to documentation
#22 opened Sep 9, 2023 by jjm469 Tutorial Documentation
@jjm469
3
FFT rewrite for area optimization I: Block Internal: Represents a verilog block for the IP S: Needs Thinking Status: A change that needs thinking before it can become actionable.
#19 opened Sep 9, 2023 by UnsignedByte
@UnsignedByte @fangzhonglyu @jjm469
Check Digital Tutorial documentation Improvements or additions to documentation
#17 opened Sep 8, 2023 by jjm469
@VickyLe03
4
Boolean Board tinkering documentation Improvements or additions to documentation I: Hardware Internal: IRL Hardware tinkering/testing, minimally related to the github.
#16 opened Sep 4, 2023 by UnsignedByte
@UnsignedByte @VickyLe03 @jjm469
Macro to automatically generate harness for pymtl I: Macros/Tools Internal: relating to macros and internal tools for the c2s2_ip I: Verification Internal: Relating to testing/verification for a block. S: Needs Thinking Status: A change that needs thinking before it can become actionable.
#13 opened Sep 4, 2023 by UnsignedByte
@UnsignedByte @tomaschoi03
2
Tool additions to the new IP tracker Tracks some larger set of changes.
#6 opened Sep 2, 2023 by UnsignedByte
14 of 17 tasks
@UnsignedByte @jjm469
ProTip! Adding no:label will show everything without a label.